• 제목/요약/키워드: RF frontend

검색결과 7건 처리시간 0.022초

An Integrated High Linearity CMOS Receiver Frontend for 24-GHz Applications

  • Rastegar, Habib;Ryu, Jee-Youl
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • 제16권5호
    • /
    • pp.595-604
    • /
    • 2016
  • Utilizing a standard 130-nm CMOS process, a RF frontend is designed at 24 GHz for automotive collision avoidance radar application. Single IF direct conversion receiver (DCR) architecture is adopted to achieve high integration level and to alleviate the DCR problem. The proposed frontend is composed of a two-stage LNA and downconversion mixers. To save power consumption, and to enhance gain and linearity, stacked NMOS-PMOS $g_m$-boosting technique is employed in the design of LNA as the first stage. The switch transistors in the mixing stage are biased in subthreshold region to achieve low power consumption. The single balanced mixer is designed in PMOS transistors and is also realized based on the well-known folded architecture to increase voltage headroom. This frontend circuit features enhancement in gain, linearity, and power dissipation. The proposed circuit showed a maximum conversion gain of 19.6 dB and noise figure of 3 dB at the operation frequency. It also showed input and output return losses of less than -10 dB within bandwidth. Furthermore, the port-to-port isolation illustrated excellent characteristic between two ports. This frontend showed the third-order input intercept point (IIP3) of 3 dBm for the whole circuit with power dissipation of 6.5 mW from a 1.5 V supply.

RF Band-Pass Sampling Frontend for Multiband Access CR/SDR Receiver

  • Kim, Hyung-Jung;Kim, Jin-Up;Kim, Jae-Hyung;Wang, Hongmei;Lee, In-Sung
    • ETRI Journal
    • /
    • 제32권2호
    • /
    • pp.214-221
    • /
    • 2010
  • Radio frequency (RF) subsampling can be used by radio receivers to directly down-convert and digitize RF signals. A goal of a cognitive radio/software defined ratio (CR/SDR) receiver design is to place the analog-to-digital converter (ADC) as near the antenna as possible. Based on this, a band-pass sampling (BPS) frontend for CR/SDR is proposed and verified. We present a receiver architecture based second-order BPS and signal processing techniques for a digital RF frontend. This paper is focused on the benefits of the second-order BPS architecture in spectrum sensing over a wide frequency band range and in multiband receiving without modification of the RF hardware. Methods to manipulate the spectra are described, and reconstruction filter designs are provided. On the basis of this concept, second-order BPS frontends for CR/SDR systems are designed and verified using a hardware platform.

이동통신 소프트웨어 라디오 플랫폼 개발동향 (Trends on Development of Software Radio Platform for Mobile Communications)

  • 박철;이승규;김진업;김일규
    • 전자통신동향분석
    • /
    • 제31권6호
    • /
    • pp.107-115
    • /
    • 2016
  • 소프트웨어 기반의 이동통신 시스템 개발 기술 즉, 소프트웨어를 이용하여 재구성이 가능한 이동통신 시스템 개발 기술이 연구되어 왔다. 최근에는 소프트웨어 기반 이동 통신 시스템 개발에 가상화 기술이 적용된 가상화 기반의 이동통신 플랫폼 개발 기술에 대한 연구가 활발히 진행되고 있다. 가상화 기반 이동통신 플랫폼 개발 기술은 소프트웨어를 이용하여 범용 하드웨어 컴퓨팅 플랫폼상에서 무선 접속 기능, 프로토콜 처리 기능 및 RF/IF 신호처리 기능의 구현이 가능할 뿐만 아니라, 가상화 플랫폼을 통하여 다양한 무선 접속 규격 수용 및 유연한 시스템 자원 활용이 가능한 기술이다. 본고에서는 가상화 기반의 이동통신 플랫폼 개발 기술에 대해 간략히 소개하고, 소프트웨어 기반 이동통신 플랫폼 개발 현황 및 가상화 기반의 이동통신 시스템 플랫폼에서 소프트웨어를 통해 RF 신호처리 기능을 용이하게 하는 상용 소프트웨어 RF 플랫폼 즉, Software Radio Frontend의 개발 동향에 대해 살펴보고자 한다.

  • PDF

DPD를 적용한 TDD 방식의 통신 시스템 구조 (TDD Communication System Architecture implementing Digital Predistortion scheme)

  • 김정휘;류규태
    • 대한전자공학회:학술대회논문집
    • /
    • 대한전자공학회 2008년도 하계종합학술대회
    • /
    • pp.181-182
    • /
    • 2008
  • In this paper, an cost-effective system architecture is proposed to implement digital predistortion scheme for linearizing the PA amplifing TDD wideband signal. To make digital predistorted signal for compensating nonlinearity of PA, a dedicated ADC and a frequency-down converter are necessary. Proposed scheme is based on the TDD feature that the RF receiver frontend is idle state during the downlink signal processing time and utilize them to make the digital predistorted signal for PA.

  • PDF

Implementation and Experimental Test Result of a Multi-frequency and Multi-constellation GNSS Software Receiver Using Commercial API

  • Han, Jin-Su;Won, Jong-Hoon
    • Journal of Positioning, Navigation, and Timing
    • /
    • 제8권1호
    • /
    • pp.1-12
    • /
    • 2019
  • In this paper, we implement a navigation software of a Global Navigation Satellite System (GNSS) receiver based on a commercial purpose GNSS software receiver platform and verify its performance by performing experimental tests for various GNSS signals available in Korea region. The SX3, employed in this paper, is composed of an application program and a Radio Frequency (RF) frontend, and can capture and process multi-constellation and multi-frequency GNSS signals. All the signal processing procedure of SX3 is accessible by the receiver software designer. In particular for an easy research and development, the Application Programing Interface (API) of the SX3 has a flexible architecture to upgrade or change the existing software program, equipped with a real-time monitoring function to monitor all the API executions. Users can easily apply and experiment with the developed algorithms using a form of Dynamic Link Library (DLL) files. Thus, by utilizing this flexible architecture, the cost and effort to develop a GNSS receiver can be greatly reduced.

다중대역 통합 신호처리 가능한 GNSS 수신기 개발 플랫폼 설계 및 구현 (Design and Implementation of a GNSS Receiver Development Platform for Multi-band Signal Processing)

  • 김진석;이선용;김병균;서흥석;안종선
    • Journal of Positioning, Navigation, and Timing
    • /
    • 제13권2호
    • /
    • pp.149-158
    • /
    • 2024
  • Global Navigation Satellite System (GNSS) receivers are becoming increasingly sophisticated, equipped with advanced features and precise specifications, thus demanding efficient and high-performance hardware platforms. This paper presents the design and implementation of a Field-Programmable Gate Array (FPGA)-based GNSS receiver development platform for multi-band signal processing. This platform utilizes a FPGA to provide a flexible and re-configurable hardware environment, enabling real-time signal processing, position determination, and handling of large-scale data. Integrated signal processing of L/S bands enhances the performance and functionality of GNSS receivers. Key components such as the RF frontend, signal processing modules, and power management are designed to ensure optimal signal reception and processing, supporting multiple GNSS. The developed hardware platform enables real-time signal processing and position determination, supporting multiple GNSS systems, thereby contributing to the advancement of GNSS development and research.

도파관 천이 구조를 갖는 모노펄스 레이더용 4-Way 윌킨슨 분배기 설계 (Design of 4-Way Wilkinson Divider with Waveguide to Stripline Transition Used in The Monopulse Radar Front-end)

  • 고영목;나극환
    • 대한전자공학회논문지TC
    • /
    • 제47권11호
    • /
    • pp.69-76
    • /
    • 2010
  • 본 논문에서는 X-Band 모노펄스 레이더 RF 프론트 엔드에서 국부발진 신호를 동일 진폭, 동일 위상으로 분배하는 도파관 천이 구조를 갖는 4-Way 윌킨슨 분배기 설계에 대해 연구하였다. X-Band에서 동작하는 모노펄스 레이더 프론트 엔드는 합, 방위각 및 고각 신호를 하강변환 하는 3개의 도파관 수신믹서와 체계 연동시 X-Band 시험신호를 발생하는 SSB 도파관 믹서로 구성된다. 프론트 엔드를 구성하는 각 믹서에 국부발진(LO : Local oscillator) 신호를 입력하기 위해서는 저 손실 특성을 가지면서 동일 전력 레벨과 동 위상으로 LO 전력을 분배하는 4-Way 분배기가 요구된다. 본 논문에서는 저 손실, 동위상으로 LO 신호를 분배하기 위해 도파관 천이 구조를 갖는 4-Way 윌킨슨 분배기를 설계/제작 하였다. 제작된 윌킨슨 전력 분배기는 X-Band에서 삽입손실이 평균 6.8dB, VSWR은 1.06~1.28였으며, 이때 각 단자 출력 위상차는 최대 4.5도 이내를 유지하였다.