• ETRI Journal
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• v.26 no.1
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• pp.61-64
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• 2004

We have explored the fabrication of an InP/InGaAs single heterojunction bipolar transistor (HBT) and a wave guide p-i-n photodiode (PD) on two kinds of double stacked layers for the implementation of an optoelectronic millimeter-wave monolithic integrated circuit (OEMMIC). We applied a photosensitive polyimide for passivation and integration to overcome the large difference between the HBT and PD layers of around $3{\mu}m$. Our experiment showed that the RF characteristics of the HBT were dependent on the location of the PD layer, while the dc performances of the HBTs and PDs were independent of the type of stacked layer used. The $F_t$ and $F_{max}$ of the HBTs on the HBT/PD stacked layer were 10% lower than those of the HBTs on the PD/HBT stacked layer.

• ETRI Journal
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• v.46 no.4
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• pp.708-715
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• 2024

We propose a 10-GHz 2 × 2 phased-array radio frequency (RF) receiver with an 8-bit linear phase and 15-dB gain control range using 65-nm complementary metal-oxide-semiconductor technology. An 8 × 8 phased-array receiver module is implemented using 16 2 × 2 RF phased-array integrated circuits. The receiver chip has four single-to-differential low-noise amplifier and gain-controlled phase-shifter (GCPS) channels, four channel combiners, and a 50-Ω driver. Using a novel complementary bias technique in a phase-shifting core circuit and an equivalent resistance-controlled resistor-inductor-capacitor load, the GCPS based on vector-sum structure increases the phase resolution with weighting-factor controllability, enabling the vector-sum phase-shifting circuit to require a low current and small area due to its small 1.2-V supply. The 2 × 2 phased-array RF receiver chip has a power gain of 21 dB per channel and a 5.7-dB maximum single-channel noise-figure gain. The chip shows 8-bit phase states with a 2.39° root mean-square (RMS) phase error and a 0.4-dB RMS gain error with a 15-dB gain control range for a 2.5° RMS phase error over the 10 to10.5-GHz band.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.10a
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• pp.423-424
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• 2011

This paper has proposed a 920 MHz RF front-end for IEEE 802.15.4g SUN (Smart Utility Network) systems. The proposed 920 MHz RF front-end consists of a driver amplifier, a low noise amplifier, and a RF switch. In the TX mode, the driver amplifier has been designed as a single-ended topology to remove a transformer which causes a loss of the output power from the driver amplifier. In addition, a RF switch is located in the RX path not the TX path. In the RX mode, the proposed low noise amplifier can provide a differential output signal when a single-ended input signal has been applied to. A LC resonant circuit is used as both a load of the drive amplifier and a input matching circuit of the low noise amplifier, reducing the chip area. The proposed 920 MHz RF Front-end has been implemented in a 0.18-um CMOS technology. It consumes 3.6 mA in driver amplifier and 3.1 mA in low noise amplifier from a 1.8 V supply voltage.

• Journal of Electrical Engineering and Technology
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• v.13 no.6
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• pp.2441-2446
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• 2018

This paper presents a radio frequency-to-direct current (RF-to-DC) converter for special RF power harvesting application at 915 MHz. The major featured components of the proposed RF-to-DC converter is the combination of a cross-coupled rectifier and an active diode: first, the cross-coupled rectifier boosts the input voltage to desired level, and an active diode blocks the reverse current, respectively. A prototype was implemented using $0.18{\mu}m$ CMOS technology, and the performance was proven from the fact that the targeted RF harvesting system's full-operation with higher power efficiency; even if the system's input power gets lower (e.g., from nominal 0 to min. -12 dBm), the proposed RF-to-DC converter constantly provides 1.47 V, which is exactly the voltage level to drive follow up system components like DC-to-DC converter and so on. And, maximum power conversion efficiency is 82 % calculated from the 0 dBm input power, 2.3 mA load current.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.5
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• pp.595-604
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• 2016

Utilizing a standard 130-nm CMOS process, a RF frontend is designed at 24 GHz for automotive collision avoidance radar application. Single IF direct conversion receiver (DCR) architecture is adopted to achieve high integration level and to alleviate the DCR problem. The proposed frontend is composed of a two-stage LNA and downconversion mixers. To save power consumption, and to enhance gain and linearity, stacked NMOS-PMOS $g_m$-boosting technique is employed in the design of LNA as the first stage. The switch transistors in the mixing stage are biased in subthreshold region to achieve low power consumption. The single balanced mixer is designed in PMOS transistors and is also realized based on the well-known folded architecture to increase voltage headroom. This frontend circuit features enhancement in gain, linearity, and power dissipation. The proposed circuit showed a maximum conversion gain of 19.6 dB and noise figure of 3 dB at the operation frequency. It also showed input and output return losses of less than -10 dB within bandwidth. Furthermore, the port-to-port isolation illustrated excellent characteristic between two ports. This frontend showed the third-order input intercept point (IIP3) of 3 dBm for the whole circuit with power dissipation of 6.5 mW from a 1.5 V supply.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.11
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• pp.18-28
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• 1999

A new equivalent circuit model of package (SOP, Small Outline Package) is presented for designing radio frequency integrated circuits (RFIC). In the RF region, the paddle of a package does not work as an ideal ground. Further parasitics due to both coupling and loss have a substantial effect on MMIC. The equivalent circuit model and parameter extraction methodology for the electrical characteristics of the package are described by illustrating the SOP type packages. The accuracy of the model is evaluated by comparing the s-parameters of the commercial full-wave solver and those of HSPICE simulation with the circuit model. The proposed model shows an excellent agreement with full-wave analysis up to about 8GHz.

• Journal of Advanced Marine Engineering and Technology
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• v.33 no.1
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• pp.144-152
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• 2009

This paper propose highly miniaturized active $90^{\circ}C$ phase difference power divider and combiner for application to wireless communication system. The conventional passive $90^{\circ}C$ power divider and combiner cannot be integrated on MMIC because of their very large circuit size. Therefore, the highly miniaturized active $90^{\circ}C$ phase difference power divider and combiner are required for a development of highly integrated MMIC. In this paper, the highly miniaturized active $90^{\circ}C$ phase difference power divider and combiner employing InGaAs/GaAs HBT were designed, fabricated on GaAs substrate. According to the results, the circuit size of fabricated active $90^{\circ}C$ phase difference power divider and combiner were $1.67{\times}0.87$ mm and $2.42{\times}1.05$ mm, respectively, which were 31.6% and 2.2% of the size of conventional passive branch-line coupler. The output gain division characteristic of proposed divider circuit showed 8.4 dB and 7.9 dB respectively, and output phase difference characteristic showed $-89.3^{\circ}C$. The output gain coupling characteristic of proposed combiner circuit showed 9.4 dB and 10.5 dB respectively, and output phase difference characteristic showed $-92.6^{\circ}C$. The highly miniaturized active $90^{\circ}C$ phase difference power divider and combiner exhibited good RF performances compared with the conventional passive branch-line coupler.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2005.11a
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• pp.111-114
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• 2005

The isolation performance of the S-band single-pole single-throw (SPST) monolithic microwave integrated circuit (MMIC) switch with two different RF-interconnection approaches, microstrip and grounded coplanar waveguide (GCPW) lines, are investigated. On-to-off isolation is improved by 5.8 dB with the GCPW design compared with the microstrip design and additional improvement of 6.9dB is obtained with the coplanar wire-bond interconnection (CWBI) at 3.4 GHz. The measured insertion loss and third-order inter-modulation distortion (IMD3) are less than 2.43 dB over 2.5 CHz $\sim$ 4 GHz and greater than 64 dBc.

• Journal of Advanced Marine Engineering and Technology
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• v.35 no.4
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• pp.483-490
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• 2011

Using a coplanar waveguide employing periodic ground structure (PGS) on silicon substrate, a highly miniaturized and broadband impedance transformer was developed for application to low impedance matching in broadband. Concretely, the multi-section transformer was designed using Chebyshev polynomials design technique for ultra broadband operation. Its size was 0.026 $m^2$ on silicon substrate, which was 8.7 % of the one fabricated by conventional coplanar waveguide on silicon substrate. The transformer showed a good RF performance over a ultra broadband from 8 - 49.5 GHz.

• Journal of the Korean Magnetics Society
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• v.11 no.3
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• pp.109-113
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• 2001

Presently, an inductor adapted at MMIC (Monolithic Microwave Integrated Circuit) which is used for cellular phone or PHS operates at quasi-microwave range over 800 MHz. However, a W-CDMA (Wideband Code Division Multiple Access) will use about 2 GHz range. Therefore magnetic film device should be compatible up to 2 GHz. We have deposited Co-Pd-Al-O system film using rf sputtering method which is expected up to 2 GHz, and investigated the effect of Pd content and magnetic field annealing. When Pd composition is 19%, Hk was 118 Oe, and ${\mu}$′showed flat frequency characteristics up to 1.5 GHz. The Q factor (=${\mu}$′/${\mu}$") was 23.3 at 1 GHz, 6.7 at 1.5 GHz and 1.5 at 2 GHz, respectively. Resonance frequency was 2 GHz. Therefore Co-Pd-Al-O thin film could be used at over 1 GHz, and also expected as an inductor material for wide band CDMA type cellular phone.