• Title/Summary/Keyword: RF 칩

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Impedance and Read Power Sensitivity Evaluation of Flip-Chip Bonded UHF RFID Tag Chip (플립-칩 본딩된 UHF RFID 태그 칩의 임피던스 및 읽기 전력감도 산출방법)

  • Yang, Jeenmo
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.4
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    • pp.203-211
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    • 2013
  • UHF RFID tag designers usually ndde the chip impedance and read power sensitivity value obtained when a tag chip is mounted on a chip pad. The chip impedance, however, is not able to be supplied by chip manufacturer, since the chip impedance is varied according to tag designs and fabrication processes. Instead, the chip makers mostly supply the chip impedances measured on the bare dies. This study proposes a chip impedance and read power sensitivity evaluation method which requires a few simple auxiliary and some RF measuring equipment. As it is impractical to measure the chip impedance directly at mounted chip terminals, some form test fixture is employed and the effect of the fixture is modeled and de-embeded to determine the chip impedance and the read power sensitivity. Validity and accuracy of the proposed de-embed method are examined by using commercial RFID tag chips as well as a capacitor and a resistor the value of which are known.

A UHF-band Passive Temperature Sensor Tag Chip Fabricated in $0.18-{\mu}m$ CMOS Process ($0.18-{\mu}m$ CMOS 공정으로 제작된 UHF 대역 수동형 온도 센서 태그 칩)

  • Pham, Duy-Dong;Hwang, Sang-Kyun;Chung, Jin-Yong;Lee, Jong-Wook
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.10
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    • pp.45-52
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    • 2008
  • We investigated the design of an RF-powered, wireless temperature sensor tag chip using $0.18-{\mu}m$ CMOS technology. The transponder generates its own power supply from small incident RF signal using Schottky diodes in voltage multiplier. Ambient temperature is measured using a new low-power temperature-to-voltage converter, and an 8-bit single-slope ADC converts the measured voltage to digital data. ASK demodulator and digital control are combined to identify unique transponder (ID) sent by base station for multi-transponder applications. The measurement of the temperature sensor tag chip showed a resolution of $0.64^{\circ}C/LSB$ in the range from $20^{\circ}C$ to $100^{\circ}C$, which is suitable for environmental temperature monitoring. The chip size is $1.1{\times}0.34mm^2$, and operates at clock frequency of 100 kHz while consuming $64{\mu}W$ power. The temperature sensor required a -11 dBm RF input power, supported a conversion rate of 12.5 k-samples/sec, and a maximum error of $0.5^{\circ}C$.

An Integrated Si BiCMOS RF Transceiver for 900MHz GSM Digital Handset Application (II) : RF Transmitter Section (900MHz GSM 디지털 단말기용 Si BiCMOS RF 송수신 IC 개발 (II) : RF 송신단)

  • Lee, Kyu-Bok;Park, In-Shig;Kim, Jong-Kyu;Kim, Han-Sik
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.35S no.9
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    • pp.19-27
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    • 1998
  • The Transmitter part of single RF transceiver chip for an extended GSM handset application was circuit-designed, fabricated adn evaluated. The RF-IC Chip was processed by 0.8${\mu}m$ Si BiCMOS, 80 pin TQFP of $10 {\times} 10mm$ size, 3.3V operated RF-IC reveals, in general, quite reasonable integrity and RF performances. This paper describes development resuts of RF transmitter section, which includes IF/RF up-conversion mixer, IF/RF polyphase and pre-amplifier. The test results show that RF transmitter section is well operated within frequency range of 880~915MHz, which is defined on the extended GSM(E-GSM) specification. The transmitter section also reveals moderate power consumption of 71mA and total output power of 8.2dBm.

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A Design and Implementation of NFC Bridge Chip (NFC 브릿지 칩 설계 및 구현)

  • Lee, Pyeong-Han;Ryu, Chang-Ho;Chun, Sung-Hun;Kim, Sung-Wan
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.3
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    • pp.96-101
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    • 2015
  • This paper describes a design and implementation of the NFC bridge chip which performs interface between kinds of devices and mobile phones including NFC controller through NFC communication. The NFC bridge chip consists of the digital part and the analog part which are based on NFC Forum standard. Therefore the chip treats RF signals and then transforms the signal to digital data, so it can interface kinds of devices with the digital data. Especially the chip is able to detect RF signals and then wake up the host processor of a device. The wakeup function dramatically decreases the power consumption of the device. The carrier frequency is 13.56MHz, and the data rate is up to 424kbps. The chip has been fabricated with SMIC 180nm mixed-mode technology. Additionally an NFC bridge chip application to the blood glucose measurement system is described for an application example.

A Study for Frequency Characteristics of Solenoid-Type RF Chip Inductors (크기에 따른 솔레노이드 형태 RF 칩 인덕터의 주파수 특성 연구)

  • Kim, Jae-Wook
    • Journal of IKEEE
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    • v.11 no.4
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    • pp.145-151
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    • 2007
  • In this work, small-size, high-performance solenoid-type RF chip inductors utilizing a low-loss ${Al_2}{O_3}$ core material were investigated. The size of the chip inductors fabricated in this work were $0.86{\times}0.46{\times}0.45m^3$, $1.5{\times}1.0{\times}0.7m^3$, $2.1{\times}1.5{\times}1.0m^3$, and $2.4{\times}2.0{\times}1.4m^3$ and copper (Cu) wire with $27{\sim}40{\mu}m$ diameter was used as the coils. High frequency characteristics of the inductance, quality factor, and impedance of developed inductors were measured using an RF Impedance/Material Analyzer (HP4291B with HP16193A test fixture). It was observed that the developed inductors with the number of turns of 7 have the inductance of 13 to 100nH and exhibit the self-resonant frequency (SRF) of 6.4 to 1.1GHz. The SRF of inductors decreases with increasing the inductance and the inductors have the quality factor of 50 to 80 in the frequency range of 300MHz to 1.3GHz. In this study, small-size solenoid-type RF chip inductors with high inductance and high quality factor were fabricated successfully.

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A Fully Integrated Low-IF Receiver using Poly Phase Filter for VHF Applications (다중위상필터(Poly Phase Filter)를 이용한 VHF용 Low-IF 수신기 설계)

  • Kim, Seong-Do;Park, Dong-Woon;Oh, Seung-Hyeub
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.5A
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    • pp.482-489
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    • 2010
  • In this paper we have proposed a new architecture of DQ-IRM(Double-Quadrature Image Rejection Mixer) for image rejection in the low-IF receiver. It consist of a frequency-tunable RF PPF(Poly Phase Filter) and the quadrature mixers. The conventional DQ-IRM generates the quadrature RF signals for the RF wide band at once. But the proposed DQ-IRM with the frequency-tuable RF PPF generates the quadrature RF signals for the narrow band of 2~3 channels bandwidth, which is partitioned from the RF wide band. We designed the CMOS RF tuner for T-DMB(Terrestrial Digital Multimedia Broadcasting) with the proposed 3rd DQ-IRM using a 0.18um CMOS technology and verified the performances of the designed receiver such as the image rejection ratio, the noise figure and the power consumption. The overall NF of the RF tuner is about 1.26 dB and the image reject ratio is about 51 dB. The power consumption is 55.8 mW at 1.8 V supply voltage. The chip area is $3.0{\times}2.5mm^2$.

디지틀 이동통신의 최근 부품 개발 동향

  • 한경호
    • 전기의세계
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    • v.43 no.1
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    • pp.20-22
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    • 1994
  • 이동통신은 그 방식이 아날로그든 디지틀이든 같은 기능의 음성신호를 송신하고 수신하는 것이다. 아나로그형은 크게 RF 수신부, RF 송신부, 신호처리부 제어부 그리고 전원부로 나누어 진다. 통화시 송,수신이 동시에 이루어지므로 송신신호와 수신신호가 서로 간섭하지 않도록 정교환 신호 여과기가 필요하다. Philips사의 경우 몇개의 칩으로 RF/IF 변환, 아나로그 신호처리 그리고 신호제어를 할 수 있도록 설계하였고 몇몇 선두회사들은 하나의 아나로그 처리기로 baseband 아나로그 신호를 처리 할 수 있도록 설계하였다. RF 부분은 아직 별도의 PCB에 제작되는데 이유는 IF 부분의 송.수신부가 공간을 많이 차지하며, RF 부분에는 가격을 내리기 위해 개별 소자들이 많이 쓰이기 때문이다.

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New On-Chip RF BIST(Built-In Self Test) Scheme and Circuit Design for Defect Detection of RF Front End (RF Front End의 결함 검출을 위한 새로운 온 칩 RF BIST 구조 및 회로 설계)

  • 류지열;노석호
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.8 no.2
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    • pp.449-455
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    • 2004
  • This paper presents a novel defect detection method for one chip RF front end with fault detection circuits using input matching measurement. We present a BIST circuit using 40.25{\mu}m$ CMOS technology. We monitor the input transient voltage of the RF front end to differentiate faulty and fault-free RF front end. Catastrophic as well as parametric variation fault models are used to simulate the faulty response of the RF front end. This technique has several advantages with respect to the standard approach based on current test stimulus and frequency domain measurement. Because DUT and fault detection circuits are implemented in the same chip, this test technique only requires use of digital voltmeter (RMS meter) and RF voltage source generator for simpleand inexpensive testing.

Single Antenna Radar Sensor with FMCW Radar Transceiver IC (FMCW 송수신 칩을 이용한 단일 안테나 레이다 센서)

  • Yoo, Kyung Ha;Yoo, Jun Young;Park, Myung Chul;Eo, Yun Seong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.29 no.8
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    • pp.632-639
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    • 2018
  • This paper presents a single antenna radar sensor with a Ku-band radar transceiver IC realized by 130 nm CMOS processes. In this radar receiver, sensitivity time control using a DC offset cancellation feedback loop is employed to achieve a constant SNR, irrespective of distance. In addition, the receiver RF block has gain control to adjust high dynamic range. The RF output power is 9 dBm and the full chain gain of the Rx is 82 dB. To reduce the direct-coupled Tx signal to the Rx in a single antenna radar, a stub-tuned hybrid coupler is adopted instead of a bulky circulator. The maximum measured distance between the horn antenna and a metal plate target is 6 m.