• Proceedings of the KSME Conference
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• 2004.04a
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• pp.774-779
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• 2004

This paper describes the fault detection and failsafe logic to be used in the Electronic Stability Program (ESP). The Aim of this paper is prevention of erroneous control in the ESP. This paper introduces the fault detection logic and evaluation of residual signals. Failsafe logic consist of four redundant sub-models and they can be used for the detection of faults in each sensor (yaw rate, lateral acceleration, steering wheel angle). We presents two mathematical residual generation method ; one is the method by the average value, and the other is the method by the minimum value of the each residual. We verify a failsafe logic using vehicle test results, also we compare vehicle model based simulation results with test vehicle results.

• Journal of Information Technology Services
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• v.11 no.sup
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• pp.1-16
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• 2012

Information technology is a useful strategic weapon that can create competitive advantage and new business opportunity by applying it in the organization' value chain. IT convergence can be understood as an attempt of industrial level IT adoption to facilitate the innovation of the industry and the birth of a new industry. This study provides the comprehensive review of the Korean government' three IT assimilation programs, ubiquitous technology diffusion program of the Ministry of Knowledge Economy, u-service program of the Ministry of Public Administration and Security, and u-Defence cooperation program of the Department of Defense. The analysis is done through the interpretation of the existing literature and the logic model. The result proposes inter-agency cooperation and building of new technology road-map in the planning stage, flexible management in the execution phase, and failure tolerant evaluation system. The proposal for developing competencies and institutional foundations for IT convergence also presented.

• Journal of Institute of Control, Robotics and Systems
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• v.14 no.1
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• pp.49-53
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• 2008

A fuzzy inference logic system is proposed for gas turbine engine fault isolation. The gas path measurements used for fault isolation are exhaust gas temperature, low and high rotor speed, and fuel flow. The fuzzy inference logic uses rules developed from a model of performance influence coefficients to isolate engine faults while accounting for uncertainty in gas path measurements. Inputs to the fuzzy inference logic system are measurement deviations of gas path parameters which are transferred directly from the ECM(Engine Control Monitoring) program and outputs are engine module faults. The proposed fuzzy inference logic system is tested using simulated data developed from the ECM trend plot reports and the results show that the proposed fuzzy inference logic system isolates module faults with high accuracy rate in the environment of high level of uncertainty.

• Journal of Institute of Control, Robotics and Systems
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• v.12 no.8
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• pp.834-841
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• 2006

Recently, many enterprises are installing AMSs(Automated Manufacturing Systems) for their competitive advantages. As the level of automation increases, proper design and validation of control logic is a imperative task for the successful operation of AMSs. However, current discrete event simulation methods mainly focus on the performance evaluation. As a result, they lack the modeling capabilities for the detail logic of automated manufacturing system controller. Proposed in this paper is a method of validation of the controller logic for automated material handling system using an object-oriented design and simulation. Using this method, FA engineers can validate the controller logic easily in earlier stage of system design, so they can reduce the time for correcting the logic errors and enhance the productivity of control program development Generated simulation model can also be used as a communication tool among FA engineers who have different experiences and disciplines.

• Proceedings of the Korea Society for Industrial Systems Conference
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• 2002.06a
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• pp.166-169
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• 2002

In this paper, implements the abstract interpretation of the imperative language While in SMV model-checker and explain how to apply the logic of CTL which example the security of information flow. And show the way to translate the abstract program of While into SMV program and explain the derive process of CTL logic to test the security of the information flow. For the various security test, it is suitable to use the model-checking than to implements the abstract interpretation.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.5
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• pp.180-187
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• 1996

This paper describes a post-layout simulation method using VHDL and C for verifying the architecture of antifuse-based FPGAs and the dedicated CAD system. An antifuse-based FPGA consists of programming circuitry including decoding logic, logic modules, segmented tracks, antifuses and I/O pads. The VHDL model which includes all these elements is used for logic verification and programming verification of the implemented circuit by reconstructing the logic circuit from the bit-stream generated from layout tool. The implemented circuit comprises of logic modules and routing networks. Since the routing delay of the complex networks is comparable to the delay of the logic module in the FPGA, the accurate post-layout simulation is essential to the FPGA system. In this paper, the C program calculates the delay of the routing netowrks using SPICE, elmore or horowitz delay models and the results feedback to the VHDL simulation. Critical path anc be found from this post-layout simulation results.

• International Commerce and Information Review
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• v.16 no.3
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• pp.141-158
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• 2014

This research is intended to improve the performance of "small and medium companies international marketing program" by screening the performance indicators of the program. The program aims to prepare SMEs to penetrate foreign market and become global companies eventually. This research analyzed the current SMEs international marketing programs based on Logic Model to find the current performance measurement lacks in qualitative indicators and process evaluation with focusing on quantitative indicators and short term result evaluation. Therefore, the measurement indicators should be balanced between process and results including mid-term and long term results.

• Proceedings of the KIEE Conference
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• 2002.11c
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• pp.554-557
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• 2002

In this paper, PDP driving circuit is designed to show the pattern of still-image with ADS (Address Display Separation) driving method. The designed circuits consist of three stages which are the image processing program, digital logic parts, and power circuits. The Image processing program is designed serial-communication with RS-232C using BASIC language. Digital logic parts design ADS driving signals with Xilinx FPGA and are simulated by ModelSim 5.5f. Power circuits convert output of digital logic parts into high voltage which panel is drived.

• International Journal of Human Ecology
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• v.11 no.1
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• pp.65-74
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• 2010

Family professionals and family program staff need to consider the importance of program evaluation in Korea since an increasing number of Healthy Family Support Centers are providing diverse intervention and education programs. The purpose of this research paper is to (a) introduce a program evaluation model that includes the program life cycle; (b) help family professionals and family program staff understand the link between program implementation and evaluation processes; and (c) facilitate discussions in terms of program evaluation of Healthy Family Support Centers and evaluation roles of different levels of Healthy Family Support Centers including the headquarters, regional, and local centers. Understanding the program life cycle and relevant evaluation processes will help family professionals and family program staff be more strategic in answering critical questions about a program's effectiveness. The benefits of program evaluation and its implications are discussed.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.28 no.11
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• pp.1685-1691
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• 2004

This paper describes the fault detection and failsafe logic to be used in an Electronic Stability Program(ESP). The aim of this paper is to prevent of erroneous controls in the ESP. Developed this paper introduces the fault detection logic and evaluation of residual signals. The failsafe logic consists of four redundant sub-models, which can be used for detecting the faults in various sensors (yaw rate, lateral acceleration, steering wheel angle). We present two mathematical residual generation methods : one is a method using the average value and the other is a method using the minimum value of the each residual. We verified a failsafe logic developed using vehicle test results also we compare vehicle model based simulation results with test vehicle results.