• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.949-952
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• 2005

We propose the hardwired distributed arithmetic which is applied to multiple constant multiplications and the fixed data path in the inner product of fixed coefficient as a result of variable radix-2 multi-bit coding. Variable radix-2 multi-bit coding is to reduce the partial product in constant multiplication and minimize the number of addition and shifts. At results, this procedure reduces the number of partial products that the required multiplication timing is shortened, whereas the area reduced relative to the DA architecture. Also, this architecture shows the best performance for DCT/IDCT and DWT architecture in the point of area reduction up to 20% from reducing the partial products up to 40% maximally.

• Korean Management Science Review
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• v.10 no.2
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• pp.43-59
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• 1993

A production control information system developed for multi-product, small-lot-sized production is presented. The system is composed of interrelated modules for production planning, shop floor control, and inventory/material management. The architecture of the system, functions of each module, and information processing procedures of each function are discussed.

• Magazine of RCR
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• v.6 no.2
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• pp.30-33
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• 2011

• Journal of Technology Innovation
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• v.27 no.2
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• pp.37-71
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• 2019

How has the passenger car's architecture evolved? In the meantime, the discussions on the car architecture have been mixed, i.e., integral, modular, and the coexistence of two types. Therefore, in this study, we aim to develop two indices can measure the degree of modularization of passenger car and its all modules using global trade data. By applying the indices to the framework of architecture positioning that reflects the hierarchical structure of a product, we examined that the degree of modularization of the passenger car architecture has been enhanced. Meanwhile, the degree of modularization differs across the modules that make up the car. Specifically, we observed the higher degree of modularization in front-end, cockpit and seat modules. Whereas, we found that body module had a relatively low degree of modularization. In particular, we observed that the platform of passenger car has notably modularized due to carmakers' efforts to achieve model diversification and reduction of cost and period in new product development at the same time. Interestingly, we showed that three modules, i.e., engine, chassis (relatively less modularized), and transmission (relatively highly modularized), had a different level of modularization, even if they commonly make up the platform. We contribute to the suggestion for analytical approaches that examine the degree of modularization and its progress longitudinally. In addition, we propose the necessity of decomposition of a system into elements in a study of product architecture, considering the possibly distinctive progress of modularization across the elements.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2003.06a
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• pp.877-880
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• 2003

In a competitive and globalized business environment, the need for the green products becomes stronger. To meet these trends, the environmental assessment besides delivery, cost and quality of products should be considered as an important factor in new product development phase. In this paper. a knowledge-based approximate life cycle assessment system (KALCAS) for the collaborative design environment is developed to assess the environmental impacts in context of product concept development. It aims at improving the environmental efficiency of the product using artificial neural networks consisting of high-level product attributes and LCA results. The overall framework of the collaborative environment including KALCAS is proposed. This architecture uses the CO environment to allow users on a wide variety of platforms to access the product data and other related information. It enables us to trade-off the evaluation results between the objectives of the product development including the approximate environmental assessment in the collaborative design environment.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.1
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• pp.69-77
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• 2005

The Viterbi decoder which is used for the forward error correction(FEC) is a crucial component for successful modern communication systems. As modern communication speed rapidly high, the development of high speed communication module is important. However, since the feedback loop in ACS operation, high speed of Viterbi decoder is very difficult. In this paper, we propose an area reduced, high speed ACS Architecture of Viterbi decoder based on the radix-4 architecture. The area is reduced by rearranging the ACS operations, and the speed is improved by retiming of path metric memory. The proposed ACS architecture of Viterbi decoder is implemented in VHDL and synthesized in Xilinx ISE 6.2i. The area-time product of the proposed architecture is improved by 11% compared to that of the previous high speed radix-4 ACS architecture.

• The Research Journal of the Costume Culture
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• v.25 no.5
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• pp.611-628
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• 2017

As a plan for establishing Korea's cultural identity and its competitive edge in the world market and for enhancing Korea's cultural status, creative and unique high value-added cultural products need to be developed utilizing our inherent cultural assets. Accordingly, this study focused on the development of the design of fashion cultural products that utilize the convergence of Hangeul our peculiar font style and Korea's cultural heritage, which is registered as part of UNESCO's World Heritage. A design method was devised that converges archetypal images of cultural property with the unique Hangeul font in a way that targets Korea's symbolic architectures. The symbolic architecture includes Korea's world-heritage pagoda architecture, such as Seokgatap pagoda and Dabotap pagoda at Bulguksa temple. It also included the architecture of royal palace, such as Injeongjeon hall at Changdeokgung palace. Finally, it also included the architecture of the fortress wall, such as Paldalmun gate in Hwaseong fortress. Thus, by developing cultural assets made from a convergence between architecture and the Hangeul font as a consumer-product image that has universality, the possibility of cultural products was pursued by applying color planning after an analysis that involved extracting the compositional colors of the flags of the world. This research and approach will lead to opportunities for further progress for Korea's cultural products in the global market as a results of additional recognition for their value, excellence, and universal appeal.

• Proceedings of KOSOMES biannual meeting
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• 2017.04a
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• pp.252-252
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• 2017

• Journal of the Korean Institute of Landscape Architecture
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• v.21 no.3
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• pp.21-33
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• 1993

The evaluation is one of aspects of criticism, and thus it plays many roles in terms of the functions of criticism. The purpose of this study is to examine the evaluating criteria of landscape architectural works. The conclusions of this study are summarized as follows: The essential criterion of the evaluation is 'the originality' with respect to history(or tradition) of landscape architecture. And the sub-criteria of the evaluation can be invented through a frame;[↔ ↔].

• Journal of Electrical Engineering and Technology
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• v.4 no.4
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• pp.559-565
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• 2009

Power dissipation during scan testing is becoming an important concern as design sizes and gate densities increase. The high switching activity of combinational circuits is an unnecessary operation in scan shift mode. In this paper, we present a novel architecture to reduce test power dissipation in combinational logic by blocking signal transitions at the logic inputs during scan shifting. We propose a unique architecture that uses dmuxed scan flip-flop (DSF) and transmission gate as an alternative to muxed scan flip-flop. The proposed method does not have problems with auto test pattern generation (ATPG) techniques such as test application time and computational complexity. Moreover, our elegant method improves performance degradation and large overhead in terms of area with blocking logic techniques. Experimental results on ITC99 benchmarks show that the proposed architecture can achieve an average improvement of 30.31% in switching activity compared to conventional scan methods. Additionally, the results of simulation with DSF indicate that the powerdelay product (PDP) and area overhead are improved by 28.9% and 15.6%, respectively, compared to existing blocking logic method.