• Journal of Information Processing Systems
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• 제10권1호
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• pp.69-80
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• 2014

The free distance of (n, k, l) convolutional codes has some connection with the memory length, which depends on not only l but also on k. To efficiently obtain a large memory length, we have constructed a new class of (2k, k, l) convolutional codes by (2k, k) block codes and (2, 1, l) convolutional codes, and its encoder and generation function are also given in this paper. With the help of some matrix modules, we designed a single structure Viterbi decoder with a parallel capability, obtained a unified and efficient decoding model for (2k, k, l) convolutional codes, and then give a description of the decoding process in detail. By observing the survivor path memory in a matrix viewer, and testing the role of the max module, we implemented a simulation with (2k, k, l) convolutional codes. The results show that many of them are better than conventional (2, 1, l) convolutional codes.

• Journal of Information Processing Systems
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• 제18권1호
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• pp.159-172
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• 2022

The role of the interconnect network, which connects computing nodes to each other, is important in high-performance computing (HPC) systems. In recent years, the peripheral component interconnect express (PCIe) has become a promising interface as an interconnection network for high-performance and cost-effective HPC systems having the features of non-transparent bridge (NTB) technologies. OpenSHMEM is a programming model for distributed shared memory that supports a partitioned global address space (PGAS). Currently, little work has been done to develop the OpenSHMEM library for PCIe-interconnected HPC systems. This paper introduces a prototype implementation of the OpenSHMEM library through a switchless interconnect network using PCIe NTB to provide a PGAS programming model. In particular, multi-interrupt, multi-thread-based data transfer over the OpenSHMEM shared memory model is applied at the implementation level to reduce the latency and increase the throughput of the switchless ring network system. The implemented OpenSHMEM programming model over the PCIe NTB switchless interconnection network provides a feasible, cost-effective HPC system with a PGAS programming model.

• 한국정보처리학회:학술대회논문집
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• 한국정보처리학회 2009년도 추계학술발표대회
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• pp.77-78
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• 2009

In this paper, we study a pattern-aware write cache policy using a NAND flash memory in disk-based mobile storage systems. Our work is designed to face a mix of a number of sequential accesses and fewer non-sequential ones in mobile storage systems by redirecting the latter to a NAND flash memory and the former to a disk. Experimental results show that our policy improves the overall I/O performance by reducing the overhead significantly from a non-volatile cache over a traditional one.

• 한국IT서비스학회지
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• 제16권1호
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• pp.73-82
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• 2017

Recently in-memory data stream processing has been actively applied to various subjects such as query processing, OLAP, data mining, i.e., frequent item sets, association rules, clustering. However, finding regular periodic patterns of events in an infinite data stream gets less attention. Most researches about finding periods use autocorrelation functions to find certain changes in periodic patterns, not period itself. And they usually find periodic patterns in time-series databases, not in data streams. Literally a period means the length or era of time that some phenomenon recur in a certain time interval. However in real applications a data set indeed evolves with tiny differences as time elapses. This kind of a period is called as a pseudo-period. This paper proposes a new scheme called FPMH (Finding Periods using Multiple Hash functions) algorithm to find such a set of pseudo-periods over a data stream based on multiple hash functions. According to the type of pseudo period, this paper categorizes FPMH into three, FPMH-E, FPMH-PC, FPMH-PP. To maximize the performance of the algorithm in the data stream environment and to keep most recent periodic patterns in memory, we applied decay mechanism to FPMH algorithms. FPMH algorithm minimizes the usage of memory as well as processing time with acceptable accuracy.

• Macromolecular Research
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• 제16권7호
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• pp.644-650
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• 2008

This study examined the effect of nanoclays on the shape memory behavior of polyurethane (PU) in fibrous form. A cation was introduced into the PU molecules to disperse the organo-nanoclay (MMT) into poly($\varepsilon$-caprolactone) (PCL)-based PU (PCL-PU). The MMT/PCL-PU nanocomposites were then spun into fibers through melt-processing. The shape memory performance of the spun fibers was examined using a variety of thermo-mechanical tests including a new method to determine the transition temperature of shape memory polymers. The MMTs showed an improved the fixity strain rate of the MMT /PCL- PU fibers but a slight decrease in their recovery strain rate. This was explained by the limited movement of PU molecules due to the presence of nanoclays. The shape memory performance of the MMT/PCL-PU fibers was not enhanced significantly by the nanoclays. However, their recovery power was improved significantly up to a strain of approximately 50%.

• 전자공학회논문지B
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• 제29B권10호
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• pp.10-18
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• 1992

This paper considers and implementation of the memory system which provides simultaneous access to pq image points of block(p$\times$q), horizontal vector(1$\times$pq)and/vertical vector(pq$\times$1) in 2-dimension image array, where p and q are design parameters. This memory system consists of an address calculation circuit, address routing circuit, data routing circuit, module selection circuit and m memory modules where m>qp. The address calculation circuit computes pq addresses in parallel by using the difference of addresses among image points. Extra module assignment circuit is not used by improving module selection circuit with routhing circuit. By using Verilog-XL logic simulator, we verify the correctness of the memory system and estimate the performance. The implemented system provides simultaneous access to 16 image points and is 6 times faster than conventional memory system.

• 한국정보처리학회논문지
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• 제7권7호
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• pp.2204-2218
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• 2000

This paper proposes a dynamic storage allocation algorithm, QHF(quick-half-fit) for real-time systems. The proposed algorithm manages a free block list per each worked size for memory requests of small size, and a free block list per each power of 2 size for memory requests of large size. This algorithms uses the exact-fit policy for small sie requests and provides high memory utilization. The proposed algorithm also has the time complexity O(I) and enables us to easily estimate the worst case execution time (WCET). In order to confirm efficiency of the proposed algorithm, we compare he memory utilization of proposed algorithm with that of half-fit and binary buddy system that have also time complexity O(I). The simulation result shows that the proposed algorithm guarantees the constant WCET regardless of the system memory size and provides lower fragmentation ratio and allocation failure ratio thant other two algorithms.

• Journal of the Korean Academy of Child and Adolescent Psychiatry
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• 제22권4호
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• pp.302-306
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• 2011

Objectives : To investigate the cognitive functions of pediatric cancer patients and to test the hypotheses that the impairment of processing speed and working memory are more prevalent in children with medulloblastoma (MBL) compared to children with neuroblastoma (NBL). Methods : We gave the Korean version of the Wechsler Intelligent Scale for Children-III to 21 children with MBL and 24 children with NBL during outpatient follow-up after the treatment was completed. Results : Children with MBL showed below average performance across most of the sub-tests. The full scale IQ, verbal IQ, and performance IQ of children with MBL were significantly lower than those of children with NBL. There were significant differences between two groups in coding and Digit Span subtest scores. Children with MBL performed especially poorly in the coding subtest. Conclusion : These findings support previous reports of generally low IQ and the dysfunction of processing speed and working memory among children with MBL, a kind of central nervous system tumor. Further investigation is needed to determine how the deficit of processing speed and working memory affect neurocognitive development and general intelligent functions.

• 인지과학
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• 제23권2호
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• pp.249-267
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• 2012

본 연구에서는 구문 처리에서 운율 정보 활용이 작업 기억 용량의 영향을 받는지를 검증하였다. 구체적으로 작업 기억 용량이 운율 경계의 강도와 위치에 따른 관계절 부착 중의성 해소 방식 차이를 예측하는지를 알아보았다. 실험 결과, 작업 기억 폭이 큰 청자들의 중의성 해소 방식이 작업 기억 폭이 작은 청자들에 비해 운율 경계 강도의 영향을 더 받는 것으로 나타났다. 이는 다른 상위 수준 제약과 마찬가지로 운율 제약의 활용도 작업 기억과 같은 인지적 자원을 필요로 함을 시사한다.

• 한국항공우주학회지
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• 제36권8호
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• pp.816-823
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• 2008

본 논문에서는 Xilinx GTP 인터페이스와 DDR-2 메모리를 이용하여 개발된 고속 데이터 처리 유닛의 시험 결과를 제시하였다. 고속 데이터 처리 유닛은 1.25Gbps로 수신된 데이터를 메모리에 저장하며 이 데이터는 다시 700Mbps로 수신 저장 시스템으로 전송된다. 따라서 고속의 데이터 처리를 위해서 CPU 대신에 FPGA가 직접 메모리를 읽고 쓸 수 있도록 DDR-2 메모리 제어기를 구현 하였다.