• 제목/요약/키워드: Process Re-engineering

검색결과 683건 처리시간 0.024초

Numerical analysis on foam reaction injection molding of polyurethane, Part A: Considering re-condensation of physical foam agent

  • Han, HyukSu;Nam, Hyun Nam;Eun, Youngkee;Lee, Su Yeon;Nam, Jeongho;Ryu, Jeong Ho;Lee, Sung Yoon;Kim, Jungin
    • 한국결정성장학회지
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    • 제26권5호
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    • pp.209-214
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    • 2016
  • Foam reaction injection molding (FRIM) is a widely used process for manufacturing polyurethane foam with complex shapes. Numerical model for polyurethane foam forming reaction during FRIM process has been intensively investigated by a number of researchers to precisely predict final shapes of polyurethane foams. In this study, we have identified a problem related with a previous theoretical model for polyurethane foam forming reaction. Thus, previous theoretical model was modified based on experimental and computational results.

Beyond SDLC: Process Modeling and Documentation Using Thinging Machines

  • Al-Fedaghi, Sabah
    • International Journal of Computer Science & Network Security
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    • 제21권7호
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    • pp.191-204
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    • 2021
  • The software development life cycle (SDLC) is a procedure used to develop a software system that meets both the customer's needs and real-world requirements. The first phase of the SDLC involves creating a conceptual model that represents the involved domain in reality. In requirements engineering, building such a model is considered a bridge to the design and construction phases. However, this type of model can also serve as a basic model for identifying business processes and how these processes are interconnected to achieve the final result. This paper focuses on process modeling in organizations, per se, beyond its application in the SDLC when an organization needs further documentation to meet its growth needs and address regular changes over time. The resultant process documentation is created alongside the daily operations of the business process. The model provides visualization and documentation of processes to assist in defining work patterns, avoiding redundancy, or even designing new processes. In this paper, a proposed diagrammatic representation models each process using one diagram comprising five actions and two types of relations to build three levels of depiction. These levels consist of a static description, events, and the behavior of the modeled process. The viability of a thinging machine is demonstrated by re-modeling some examples from the literature.

반도체 설비의 효율성 제고를 위한 설비 할당 스케줄링 규칙에 관한 연구 (A Study on Deterministic Utilization of Facilities for Allocation in the Semiconductor Manufacturing)

  • 김정우
    • 산업경영시스템학회지
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    • 제39권1호
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    • pp.153-161
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    • 2016
  • Semiconductor manufacturing has suffered from the complex process behavior of the technology oriented control in the production line. While the technological processes are in charge of the quality and the yield of the product, the operational management is also critical for the productivity of the manufacturing line. The fabrication line in the semiconductor manufacturing is considered as the most complex part because of various kinds of the equipment, re-entrant process routing and various product devices. The efficiency and the productivity of the fabrication line may give a significant impact on the subsequent processes such as the probe line, the assembly line and final test line. In the management of the re-entrant process such as semiconductor fabrication, it is important to keep balanced fabrication line. The Performance measures in the fabrication line are throughput, cycle time, inventory, shortage, etc. In the fabrication, throughput and cycle time are the conflicting performance measures. It is very difficult to achieve two conflicting goal simultaneously in the manufacturing line. The capacity of equipment is important factor in the production planning and scheduling. The production planning consideration of capacity can make the scheduling more realistic. In this paper, an input and scheduling rule are to achieve the balanced operation in semiconductor fabrication line through equipment capacity and workload are proposed and evaluated. New backward projection and scheduling rule consideration of facility capacity are suggested. Scheduling wafers on the appropriate facilities are controlled by available capacity, which are determined by the workload in terms of the meet the production target.

J2EE 패턴기반의 컴포넌트 개발 프로세스 (J2EE Pattern Based Component Development Process)

  • 최일우;류성열;이남용
    • 한국전자거래학회지
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    • 제7권3호
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    • pp.219-240
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    • 2002
  • The various software engineering techniques have been appeared in order to cope with the software crisis since 1980's. Currently, the research against the techniques likes the Design pattern, Component which improve the software's re-use are spread out. Also S/W Development Process are interested intensively which attempts the quality and a increasing productivity of software development with the basic policy. The design pattern is the solution against the problem which occurs repeat in a specific area. Many design pattern are developed and researched, but the method which accommodates the developed design pattern efficiently in the phase of analysis and design software development process is not good enough, so it is the actual applying technique is difficult. In this paper we suggest and the “UML components+” which is a efficient component development process from customizing EJB based the J2EE using the “UML Components” which is a component development methodology. Applying J2EE pattern efficiently with UML components+, there is a possibility of efficiency in the component development based pattern.

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제조업종의 표준 업무프로세스 개발 연구 (A Study on Process-driven Standardization in Manufacturing Industries)

  • 김훈태;정한일;한정우;양은찬;임춘성
    • 한국전자거래학회:학술대회논문집
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    • 한국전자거래학회 2001년도 International Conference CALS/EC KOREA
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    • pp.277-288
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    • 2001
  • Nowadays, for the competitive power of an enterprise, there are many attempts to implement information system that could support business innovation by business process re-engineering. However, there is no effort to standardize the core business processes of enterprise based on standards of data, documents. These facts make it difficult to introduce and implement enterprise information system designed by business processes of the higher level. Therefore, standardization of business process by analyzing the functionality and relationships among them are important and necessary. The results of our research are summarized as process-driven standardization (standardization of core business processes) and development of a repository. In process-driven standardization, we proposed the reference model by analyzing the business processes of the leading enterprises for core business processes. The reference model focuses on core business processes, such as sales management, procurement management, production management, logistics management, and customer support in manufacturing industry. We developed a knowledge-based system as a repository for a integrated management system of business process. And this repository was built up web-based system for the purpose of both reference and management.

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Development Process of FPGA-based Departure from Nucleate Boiling Ratio Algorithm Using Systems Engineering Approach

  • Hwang, In Sok;Jung, Jae Cheon
    • 시스템엔지니어링학술지
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    • 제14권2호
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    • pp.41-48
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    • 2018
  • This paper describes the systems engineering development process for the Departure from Nucleate Boiling Ratio (DNBR) algorithm using FPGA. Current Core Protection Calculator System (CPCS) requirement and DNBR logic are analyzed in the reverse engineering phase and the new FPGA based DNBR algorithm is designed in the re-engineering phase. FPGA based DNBR algorithm is developed by VHSIC Hardware Description Language (VHDL) in the implementation phase and VHDL DNBR software is verified in the software Verification & Validation phase. Test cases are developed to perform the software module test for VHDL software modules. The APR 1400 simulator is used to collect the inputs data in 100%, 75%, and 50% reactor power condition. Test input signals are injected to the software modules following test case tables and output signals are compared with the expected test value. Minimum DNBR value from developed DNBR algorithm is validated by KEPCO E&C CPCS development facility. This paper summarizes the process to develop the FPGA-based DNBR calculation algorithm using systems engineering approach.

리버스 엔지니어링으로 생성된 데이터를 이용한 쾌속 조형 기술 연구 (Rapid Prototyping from Reverse Engineered Geometric Data)

  • 우혁제;이관행
    • 한국정밀공학회지
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    • 제16권1호통권94호
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    • pp.95-107
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    • 1999
  • The design models of a new product in general are created using clay models or wooden mock-ups. The reverse engineering(RE) technology enables us to quickly create the CAD model of the new product by capturing the surface of the model using laser digitizers or coordinate measuring machines. Rapid prototyping (RP) is another technology that can reduce the product development time by fabricating the physical prototype of a part using a layered manufacturing technique. In reverse engineering process, however, the digitizer generates an enormous amount of point data, and it is time consuming and also inefficient to create surfaces out of these data. In addition, the surfacing operation takes a great deal of time and skill and becomes a bottleneck. In rapid prototyping, a faceted model called STL file has been the industry standard for providing the CAD input to RP machines. It approximates the CAD model of a part using many planar triangular patches and has drawbacks. A novel procedure that overcomes these problems and integrates RE with RP is proposed. Algorithms that drastically reduce the point clouds data have been developed. These methods will facilitate the use of reverse engineered geometric data for rapid prototyping, and thereby will contribute in reducing the product development time.

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기술성숙도(TRL)평가방법 수립 및 적용사례 (The framework of Technology Readiness Level(TRL) Assessment and Case Study)

  • 박경진
    • 시스템엔지니어링학술지
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    • 제5권2호
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    • pp.43-48
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    • 2009
  • This paper aims to develop the framework for evaluating the technology maturity by utilizing TRA(Technology Readiness Assessment) approach. In this context, we will provide the directions through analyzing the domestic acquisition process and re lated regulations, and clarify the scenarios to apply the proposed framework to the defense R&D programs. The paper will conclude with the case study for the evolution of the proposed framework.

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자동차 부품의 재제조산업 활성화방안에 관한 연구 (A Study on Remanufacturing Industry for automobile parts)

  • 송병석;조재립
    • 한국품질경영학회:학술대회논문집
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    • 한국품질경영학회 2009년도 추계학술대회
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    • pp.230-233
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    • 2009
  • Remanufacturing is an industrial manufacturing process. The merits of manufacturing are to reuse old products to perform like a new product and to save energy, natural resources, landfill space and to reduce air pollution by less re-smelting. This paper proposes a systemic approach for activating the domestic remanufacturing industry. The approach is based on inside and outside regulations to apply remanufacturing companies. And, we analyzed the state and problems of remanufacturing industry for automobile parts.

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금속조형법을 위한 실시간 형상 모델링과 VRML 응용에 관한 연구

  • 정영대;최홍태;이석희
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 1997년도 춘계학술대회 논문집
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    • pp.321-326
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    • 1997
  • This paper present how VRML file format can be used for RP Technology. VRML standards provids compact and powerful interface between remote RP manufacturer in network independent environment. We have constructed integrated and network-connected server system which can share the CAD data and varios process which is STL-to-VRML translater,slicing process,slice anchor process etc. This Server system consisted in file converter between STL and VRML,CGI system which sends a generated data to VRML client or browser, slice-generator which can re-slice at varied thickness and simulator which can show and check simultaneously status between near slices with support. This system aims to the integrated simulator which supports graphic animator and FEA analysis system.