• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 추계학술대회 논문집 전력기술부문
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• pp.297-299
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• 2003

This paper proposes a totally new method in the chaos characteristics analysis of power systems, the introduction of topological invariants. Using a return histogram the bifurcation graph was drawn, the periodic orbits and topological invariants the local crossing number, relative rotation rates, and linking number during the process of period-doubting bifurcation and chaos were extracted. This study also examined the effect on the topological invariants when the sensitive parameters were varied. In addition, the topological invariants of a three-dimensional embedding of the strange attractor was extracted and the result was compared with those obtained from differential equations. This could be a new way for a state detection and fault diagnosis in a dynamical system.

• 대한전자공학회논문지SD
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• 제47권2호
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• pp.106-114
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• 2010

본 논문은 기가 스케일 System on Chip(SoC)를 위한 통합 설계 및 검증 플랫폼을 제안한다. VLSI 집적도의 발달로 그 복잡도가 증가하여 기존의 RTL 설계 방식으로는 그 생산성 차이(Production Gap)를 극복할 수 없게 되었다. 또한, 검증 차이(Verification Gap)의 증가로 검증 방법론에도 커다란 변혁이 필요하게 되었다. 본 플랫폼은 기존의 상위 수준 합성을 포함하며, 그 결과물을 이용하여 저 전력 설계의 전원 인식 검증 플랫폼과 검증 자동화를 개발하였다. 상위 수준 합성 시 사용되는 Control and Data Row Graph (CDFG)와 고 입력인 상위 수준 언어와 RTL를 기반으로 한 검증 플랫폼 자동화와 전원 인식 검증 방법론을 개발하였다. 검증 플랫폼에는 자동 검사 기능을 포함하고 있으며 Coverage Driven Verification을 채택하고 있다. 특히 전원 인식 검증을 위하여 개발된 조건 랜덤 벡터 생성 알고리듬을 사용하여 랜덤 벡터의 개수를 최소 5.75배 감소시키는 효과를 가져왔고, 전원과 전원 셀에 대한 모델링 기법을 이용하여 일반적인 로직 시뮬레이터 툴을 통해서도 전원 인식 검증을 가능하게 하였다. 이러한 통합된 설계 및 검증 플랫폼은 시스템 수준의 설계에서 검증, 합성에 이르는 전 설계 흐름을 완전 자동화 하여 상위 수준의 설계와 검증을 가능하게 하고 있다.

• 한국CDE학회논문집
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• 제5권3호
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• pp.276-284
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• 2000

Usual practice of the transformation of a B-spline curve into a set of piecewise polynomial curves in a power form is done by either a knot refinement followed by basis conversions or applying a Taylor expansion on the B-spline curve for each knot span. Presented in this paper is a new algorithm, called a direct expansion algorithm, for the problem. The algorithm first locates the coefficients of all the linear terms that make up the basis functions in a knot span, and then the algorithm directly obtains the power form representation of basis functions by expanding the summation of products of appropriate linear terms. Then, a polynomial segment of a knot span can be easily obtained by the summation of products of the basis functions within the knot span with corresponding control points. Repeating this operation for each knot span, all of the polynomials of the B-spline curve can be transformed into a power form. The algorithm has been applied to both static and dynamic curves. It turns out that the proposed algorithm outperforms the existing algorithms for the conversion for both types of curves. Especially, the proposed algorithm shows significantly fast performance for the dynamic curves.

• ETRI Journal
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• 제45권4호
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• pp.650-665
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• 2023

A novel smart metering technique capable of anomaly detection was proposed for real-time home power management system. Smart meter data generated in real-time were obtained from 900 households of single apartments. To detect outliers and missing values in smart meter data, a deep learning model, the autoencoder, consisting of a graph convolutional network and bidirectional long short-term memory network, was applied to the smart metering technique. Power management based on the smart metering technique was executed by multi-objective optimization in the presence of a battery storage system and an electric vehicle. The results of the power management employing the proposed smart metering technique indicate a reduction in electricity cost and amount of power supplied by the grid compared to the results of power management without anomaly detection.

• 디지털콘텐츠학회 논문지
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• 제14권1호
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• pp.1-5
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• 2013

본 논문은 효율적인 CPLD 저전력 알고리즘을 제안하였다. 제안한 알고리즘은 DAG를 이용한 그래프 분할 방식을 적용하였다. 주어진 회로를 DAG로 표현한 후 각각의 노드의 값을 설정하여 회로를 구현하고자 하는 CPLD의 구성 요소에 맞도록 매핑 가능 클러스터를 생성한다. 생성된 매핑 가능 클러스터의 OR 텀수와 입력 변수의, 출력 변수의 수를 고려하여 매핑 가능 클러스터의 소모 전력 값을 구한다. 생성된 매핑 가능 클러스터와 소모 전력 값을 고려하여 소모전력이 최소가 되는 매핑 가능 클러스터를 선정하여 회로를 구현한다. 실험은 [9]와 비교하였으며, 소모전력이 감소되어 알고리즘의 효율성이 입증되었다. 논문에서는 소모 전력을 위한 FPGA 알고리즘을 제안하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 제36회 하계학술대회 논문집 전기설비
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• pp.100-102
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• 2005

This paper is purpose to introduce the database management program of insulation tests for high voltage rotating machines. KEPRI has carried out insulation tests for high voltage equipment since 1998, the number of tests grow larger every year. It is difficult to manage the numerous test results, so we developed the insulation diagnostic database program. The features of this program are an easy-search test result and making a graph of AC, tan${\Delta}$ test. the most useful function is the trend management. Using the trend function, we can find the aging deterioration for high voltage machines easily.

• Nuclear Engineering and Technology
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• 제56권5호
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• pp.1603-1618
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• 2024

Emergency operation plans are indispensable elements for effective process safety management especially when unanticipated events occur under extreme situations. In the paper, a synthesis framework is proposed for the integration success path planning and performance analysis. Within the synthesis framework, success path planning is implemented through flow-directed signal tracing, renaming and reconstruction from a complete collection of Minimal Path Sets (MPSs) that are obtained using graph traversal search on GO-FLOW model diagram. The performance of success paths is then evaluated and prioritized according to the task complexity and probability calculation of MPSs for optimum action plans identification. Finally, an Auxiliary Feed Water System of Pressurized Water Reactor (PWR-AFWS) is taken as an example system to demonstrate the flow-directed MPSs search method for success path planning and performance analysis. It is concluded that the synthesis framework is capable of providing procedural guidance for emergency response and safety management with optimal success path planning under extreme situations.

• 대한수학회지
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• 제56권5호
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• pp.1403-1418
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• 2019

Let R be a commutative ring with unity. If f(x) is a zero-divisor polynomial such that $f(x)=c_f f_1(x)$ with $c_f{\in}R$ and $f_1(x)$ is not zero-divisor, then $c_f$ is called an annihilating content for f(x). In this case $Ann(f)=Ann(c_f )$. We defined EM-rings to be rings with every zero-divisor polynomial having annihilating content. We showed that the class of EM-rings includes integral domains, principal ideal rings, and PP-rings, while it is included in Armendariz rings, and rings having a.c. condition. Some properties of EM-rings are studied and the zero-divisor graphs ${\Gamma}(R)$ and ${\Gamma}(R[x])$ are related if R was an EM-ring. Some properties of annihilating contents for polynomials are extended to formal power series rings.

• 한국통신학회논문지
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• 제27권11C호
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• pp.1132-1138
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• 2002

본 논문은 시간 제약 조건하에서의 최적 선택 공급 전압을 위한 전력 감소 스케줄링 알고리듬을 제안한다. 전력감소 스케줄링에서는 전력소비를 줄이기 위해 가변 전압 레벨을 이용해 최적 공급 전압을 선택 휴리스틱 방법으로 연산을 수행하여 제어 스텝을 결정한다. 그리고 최적 선택 공급 전압 바인딩에서는 그래프 컬러링 기법을 이용해 레지스터 상의 전력 소비의 주원인인 스위칭 활동을 최소화한다. 상위 수준 벤치마크 예제를 이용한 실험으로부터 우리는 최적 선택 공급 전압을 이용한 제안한 알고리듬이 획일화된 단일 전압을 이용한 알고리듬보다 전력 소비를 줄이는데 효율적임을 보인다.

• 대한전자공학회논문지
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• 제21권6호
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• pp.70-77
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• 1984

This paper represents a fast computational algorithm for the discrete sine transform defined by Kekre and Solanki. Techniques are developed to factor the discrete sine trans form matrix into M=log2 2N matrices, where the number(N) of sampled data points is a power of two. Each factorial matrix contains not more than two non-zero real elem tints in any row or column. As a result of this method, the exact a배orithm for the fast discrete sine transform is accomplished. The algorithm is illustiated by a signal flow graph, which may be readily translated to hardware or software implementation.