• Title/Summary/Keyword: Power capacitor

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Transmission method of output control signal for an isolated AC/DC converter using Y-capacitor and integrator instead of a photo-coupler (Y-capacitor와 미분기를 이용한 포토커플러 없는 절연형 AC/DC컨버터의 출력제어신호 전송기법)

  • Yang, Jung-Woo;Kim, Hugh;Choi, Heung Gyun;Heo, Tae Won;Han, Sang-Gyu
    • Proceedings of the KIPE Conference
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    • 2014.07a
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    • pp.359-360
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    • 2014
  • 본 논문은 Y-capacitor와 미분기를 이용한 절연형 AC/DC컨버터의 제어신호 전송기법을 제안한다. 기존 SSR(Secondary Side Regulation)의 제어단(Photo-coupler, TL431 및 부가회로)은 바이어스 전류에 의한 대기전력 손실이 크다. 하지만 제안된 방식은 기존 SSR의 제어단을 제거하고, 2차 측 제어신호를 EMI노이즈 경로로 사용되는 Y-capacitor와 저항, 커패시터만을 이용하여 1차 측으로 전송한다. 제안 신호전송기법의 이론적 해석과 PSIM Tool을 이용한 Simulation 결과를 통하여 타당성을 검증하였다.

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Load and Capacitor Stacking Topologies for DC-DC Step Down Conversion

  • Mace, Jules;Noh, Gwangyol;Jeon, Yongjin;Ha, Jung-Ik
    • Journal of Power Electronics
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    • v.19 no.6
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    • pp.1449-1457
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    • 2019
  • This paper presents two voltage domain stacking topologies for powering integrated digital loads such as multiprocessors or 3D integrated circuits. Pairs of loads and capacitors are connected in series to form a stack of voltage domains. The voltage is balanced by switching the position of the capacitors in one case and the position of the loads in the other case. This method makes the voltage regulation robust to large differential load power consumption. The first configuration can be named the load stacking topology. The second configuration can be named the capacitor stacking topology. This paper aims at proposing and comparing these two topologies. Models of both topologies and a switching scheme are presented. The behavior, control scheme, losses and overall performance are analyzed and compared theoretically in simulation and experiments. Experimental results show that the capacitor stacking topology has better performance with a 30% voltage ripple reduction.

Hybrid Active Filter System for High Power Non-linear Loads (비선형 부하를 위한 복합전력필터)

  • Kang Min-Su;Rho Youn-Sung;Kim Soo-Gon;Jeon Hee-Jong
    • Proceedings of the KIPE Conference
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    • 2003.07a
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    • pp.182-185
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    • 2003
  • Proposed Hybrid System is composed of phase leading capacitor banks, LC passive filters and active power filter. The passive power filter in parallel connection eliminate the 5th and 7th harmonics. The Variable capacitor banks correct the most of power factor, and the active power filter takes charge of remainder,

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DC Injection Control for Grid-Connected Single-Phase Inverters Based on Virtual Capacitor

  • Wang, Wei;Wang, Ping;Bei, Taizhou;Cai, Mengmeng
    • Journal of Power Electronics
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    • v.15 no.5
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    • pp.1338-1347
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    • 2015
  • DC injection is a critical issue in transformerless grid-connected inverters. DC injection control based on virtual capacitor has the advantages of low cost, low loss, high accuracy and easy implementation. In this paper, the principle of DC injection control based on virtual capacitor was analyzed. In addition, the applicable conditions, working process, steady state error and advantages were also discussed in detail. The design of the control parameters based on virtual capacitor was proposed in a grid-connected inverter with LCL filter. The robustness of the control parameters was also discussed. Simulation and experimental results verify the validity of the analysis and demonstrate that this research has a certain value in engineering applications.

A Study on Capacitor Placement Using ESGA Hybrid Approach in Unbalanced Distribution Systems (ESGA를 이용한 불평형 배전계통의 커패시터 설치에 관한 연구)

  • 김규호;이유정;이상봉;유석구
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.52 no.6
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    • pp.316-324
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    • 2003
  • This paper applied Elite-based Simplex-GA hybrid approach combined with Muptipop-GA (ESGA) to determining the location, size and number of capacitors to improve voltage profile and minimize power losses in unbalanced distribution systems. One of the main obstacles in applying GA to complex problems has been the high computational cost due to their slow convergence rate. To alleviate this difficulty, ESGA approach was developed that combines Elite-based Simplex-GA hybrid approach with Muptipop-GA. The objective function formulated consists of two terms: cost for energy losses and cost related to capacitor purchase and capacitor installation. The cost function associated with capacitor placement is considered as a step function due to banks of standard discrete capacities. Its efficiency was proved through the application in IEEE 13 bus and 34 bus test systems and was compared with several methods using GA.

Life Estimation of Electrolytic Capacitors for Inverters (인버터용 전해커패시터의 수명 추정)

  • Lee, Dong-Choon;Kim, Hyung-Jin
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.50 no.7
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    • pp.338-346
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    • 2001
  • In this paper, dc link currents for the three-phase diode rectifiers and PWM inverters are analyzed and an algorithm of estimating the life of dc link electrolytic capacitors using the analyzed ripple current is presented. Since the capacitor life is dependent on the operating temperature, the power dissipation in capacitors should be calculated. For this, the ESR(equivalent series resistance) model of the capacitor is derived and ripple currents through the capacitor are analyzed. Relating the power dissipation and the heat transfer equation, the internal operating temperature is calculated. Then, the capacitor life can be predicted by using Arrhenius's equation. An example for applications is given for the practical system.

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A Study on Preventing Transient Phenomena Due to Capacitor Switching in Distribution System involving Distributed Generation System (분산전원이 도입된 배전계통에서 커패시터 스위칭에 의한 과도현상 방지에 대한 연구)

  • Lee, D.G.;Hwang, J.S.;Ju, Y.H.;Kim, J.E.
    • Proceedings of the KIEE Conference
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    • 2001.07a
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    • pp.10-12
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    • 2001
  • This paper presents a study of transient overvoltages caused by capacitor switching on the utility distribution system. Capacitor banks used for power factor correction and voltage regulation can improve efficiency of the power system. But transient voltages due to capacitor switching on the utility system affect the sensitive customer load equipments. If Distributed Generation System (DGS) is involved in the system, the problems become more serious. In this paper, effect of transient voltages at the customer load created by utility capacitor switching is analyzed by simulations Solutions to this problem are presented.

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A New Soft-Switching Three-Level Flying Capacitor Converter (새로운 소프트스위칭 3레벨 Flying Capacitor 컨버터)

  • Kim, Jae-Hoon;Kim, Sun-Ju;Choi, Se-Wan
    • The Transactions of the Korean Institute of Power Electronics
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    • v.25 no.6
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    • pp.484-489
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    • 2020
  • This study proposes a new soft-switching three-level flying capacitor converter with low filter inductance. The proposed converter can achieve zero voltage switching (ZVS) turn-on of all switches by using auxiliary components La and Ca. It can also reduce filter inductance because the applied voltage of the filter inductor is decreased by using the flying capacitor. Furthermore, filter inductance can be reduced because the operating frequency of the filter inductor is doubled by the phase shifting between switches S3 and S4. The operation principle, design of passive components for ZVS turn-on, interleaving effects, and comparison of different topologies are presented. The experimental waveforms of a 1 kW two-phase interleaved converter prototype are provided to verify the validity of the proposed converter.

A Low Power ROM Using A Single Charge Sharing Capacitor and Hierarchical Bit Line (한 개의 전하공유 커패시터와 계층적 비트라인을 이용한 저전력 롬)

  • Yang, Byung-Do
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.1
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    • pp.76-83
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    • 2007
  • This paper describes a low power ROM using single charge-sharing capacitor and hierarchical bit line (SCSC-ROM). The SCSC-ROM reduces the power consumption in bit lines. It lowers the swing voltage of bit lines to a very small voltage by using a charge-sharing technique with a single capacitor. It implements the capacitor with dummy bit lines to improve noise immunity and make easy to design. The hierarchical bit line further saves the power by reducing the capacitance in bit lines. The SCSC-ROM also reduces the power consumption in control unit and predecoder by using the hierarchical word line decoder. The simulation result shows that the SCSC-ROM with $4K{\times}32bits$consumes only 37% power of a conventional ROM. A SCSC-ROM chip is fabricated in a $0.25{\mu}m$ CMOS process. It consumes 8.2mW at 240MHz with 2.5V.

Optimized Capacitor Bank Design for Capacitive Current Test for High Power Laboratory and Analysis with EMTP Simulation (대전력 시험소의 부하시험용 콘덴서 뱅크의 최적 설계 및 EMTP 해석)

  • Ahn, S.H.;Lee, H.C.;Ham, G.H.;Kim, H.K.
    • Proceedings of the KIEE Conference
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    • 1998.07c
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    • pp.1220-1223
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    • 1998
  • High Power Laboratory is the facility for building to simulate the various phenomena generated from electric systems of the real world and to test making and breaking capability, switching capability and durability of circuit breaker, switchgear and other electric utilities, moreover, load equipments which contain capacitor bank is installed for studying the diverse effects originated from the constituent of load through entire systems or receiving end. Such factors, abnormal voltage or current, can be serious in electrical systems, especially, in the case caused by capacitive components such as overvoltage or inrushcurrent, the problems may be more fatal to the systems. In this paper, the optimal design of capacitor bank which will be equipped in High Power Laboratory, which is for simulating as closely as the practical phenomena resulted from the capacitive currents, and the verification aided by computer simulations are presented. For this, analysis of the circuit characteristics according to the standards which can be criteria of the capacitive current tests and the test circuit configuration in accordance with the analysis are proposed in prelude. In the body of the paper the optimal design of capacitor bank has been obtained on the basis of all conditions mentioned above and the test circuit configuration with LGIS test requirements. furthermore, analysis and verification for the design are derived by EMTP. finally, evaluation for the capacitor bank design and further study plan are concluded.

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