• Title/Summary/Keyword: Power Semiconductor

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Low Power SoC Modem Design for High-Speed Wireless Communications (초고속 무선 통신을 위한 저전력 모뎀 SoC 설계)

  • Kim, Yong-Sung;Lim, Yong-Seok;Hong, Dae-Ki
    • Journal of the Semiconductor & Display Technology
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    • v.9 no.2
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    • pp.7-10
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    • 2010
  • In this paper, we design a modem SoC (System on Chip) for low power consumption and high speed wireless communications. Among various schemes of high speed communications, an MB-OFDM (Multi Band-Orthogonal Frequency Division Multiplexing) UWB (Ultra-Wide-Band) chip is designed. The MB-OFDM uses wide-band frequency to provide high speed data rate. Additionally, the system imposes no interference to other services. The 90nm CMOS (Complementary Metal-Oxide Semiconductor) technology is used for the SoC design. Especially, power management mode is implemented to reduce the power consumption.

SiC based Technology for High Power Electronics and Packaging Applications

  • Sharma, Ashutosh;Lee, Soon Jae;Jang, Young Joo;Jung, Jae Pil
    • Journal of the Microelectronics and Packaging Society
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    • v.21 no.2
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    • pp.71-78
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    • 2014
  • Silicon has been most widely used semiconductor material for power electronic systems. However, Si-based power devices have attained their working limits and there are a lot of efforts for alternative Si-based power devices for better performance. Advances in power electronics have improved the efficiency, size, weight and materials cost. New wide band gap materials such as SiC have now been introduced for high power applications. SiC power devices have been evolved from lab scale to a viable alternative to Si electronics in high-efficiency and high-power density applications. In this article, the potential impact of SiC devices for power applications will be discussed along with their Si counterpart in terms of higher switching performance, higher voltages and higher power density. The recent progress in the development of high voltage power semiconductor devices is reviewed. Future trends in device development and industrialization are also addressed.

Electrical Characteristics of SiC Lateral P-i-N Diodes Fabricated on SiC Semi-Insulating Substrate

  • Kim, Hyoung Woo;Seok, Ogyun;Moon, Jeong Hyun;Bahng, Wook;Jo, Jungyol
    • Journal of Electrical Engineering and Technology
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    • v.13 no.1
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    • pp.387-392
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    • 2018
  • Static characteristics of SiC (silicon carbide) lateral p-i-n diodes implemented on semi-insulating substrate without an epitaxial layer are inVestigated. On-axis SiC HPSI (high purity semi-insulating) and VDSI (Vanadium doped semi-insulating) substrates are used to fabricate the lateral p-i-n diode. The space between anode and cathode ($L_{AC}$) is Varied from 5 to $20{\mu}m$ to inVestigate the effect of intrinsic-region length on static characteristics. Maximum breakdown Voltages of HPSI and VDSI are 1117 and 841 V at $L_{AC}=20{\mu}m$, respectiVely. Due to the doped Vanadium ions in VDSI substrate, diffusion length of carriers in the VDSI substrate is less than that of the HPSI substrate. A forward Voltage drop of the diode implemented on VDSI substrate is 12 V at the forward current of $1{\mu}A$, which is higher than 2.5 V of the diode implemented on HPSI substrate.

Characteristic of On-resistance Improvement with Gate Pad Structure (온-저항 특성 향상을 위한 게이트 패드 구조에 관한 연구)

  • Kang, Ye-Hwan;Yoo, Won-Young;Kim, Woo-Taek;Park, Tae-Su;Jung, Eun-Sik;Yang, Chang Heon
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.28 no.4
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    • pp.218-221
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    • 2015
  • Power MOSFETs (metal oxide semiconductor field effect transistor) operate as energy control semiconductor switches. In order to reduce energy loss of the device during switch-on state, it is essential to increase its conductance. In this study we have investigated a structure to reduce the on-resistance characteristics of the MOSFET. We have a proposed MOSFET structure of active cells region buried under the gate pad. The measurement are carried out with a EDS to analyze electrical characteristics, and the proposed MOSFET are compared with the conventional MOSFET. The result of proposed MOSFET was 1.68[${\Omega}$], showing 10% improvement compared to the conventional MOSFET at 700[V].

High Performance Current Sensing Circuit for Current-Mode DC-DC Buck Converter

  • Jin, Hai-Feng;Piao, Hua-Lan;Cui, Zhi-Yuan;Kim, Nam-Soo
    • Transactions on Electrical and Electronic Materials
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    • v.11 no.1
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    • pp.24-28
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    • 2010
  • A simulation study of a current-mode direct current (DC)-DC buck converter is presented in this paper. The converter, with a fully integrated power module, is implemented by using sense method metal-oxide-semiconductor field-effect transistor (MOSFET) and bipolar complementary metal-oxide-semiconductor (BiCMOS) technology. When the MOSFET is used in a current sensor, the sensed inductor current with an internal ramp signal can be used for feedback control. In addition, the BiCMOS technology is applied in the converter for an accurate current sensing and a low power consumption. The DC-DC converter is designed using the standard $0.35\;{\mu}m$ CMOS process. An off-chip LC filter is designed with an inductance of 1 mH and a capacitance of 12.5 nF. The simulation results show that the error between the sensing signal and the inductor current can be controlled to be within 3%. The characteristics of the error amplification and output ripple are much improved, as compared to converters using conventional CMOS circuits.

A GaAs Power MESFET Operating at 3.3V Drain Voltage for Digital Hand-Held Phone

  • Lee, Jong-Lam;Kim, Hae-Cheon;Mun, Jae-Kyung;Kwon, Oh-Seung;Lee, Jae-Jin;Hwang, In-Duk;Park, Hyung-Moo
    • ETRI Journal
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    • v.16 no.4
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    • pp.1-11
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    • 1995
  • A GaAs power metal semiconductor field effect transistor (MESFET) operating at a voltage as low as 3.3V has been developed with the best performance for digital handheld phone. The device has been fabricated on an epitaxial layer with a low-high doped structure grown by molecular beam epitaxy. The MESFET, fabricated using $0.8{\mu}m$ design rule, showed a maximum drain current density of 330 mA/mm at $V_{gs}$ =0.5V and a gate-to-drain breakdown volt-age of 28 V. The MESFET tested at a 3.3 V drain bias and a 900 MHz operation frequency displayed an output power of 32.5-dBm and a power added efficiency of 68%. The associate power gain at 20 dBm input power and the linear gain were 12.5dB and 16.5dB, respectively. Two tone testing measured at 900.00MHz and 900.03MHz showed that a third-order intercept point is 49.5 dBm. The power MESFET developed in this work is expected to be useful as a power amplifying device for digital hand-held phone because the high linear gain can deliver a high power added efficiency in the linear operation region of output power and the high third-order intercept point can reduce the third-order intermodulation.

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Hybrid LVDC Circuit Breakers (저압직류용 하이브리드 차단기)

  • Hyo-Sung, Kim
    • The Transactions of the Korean Institute of Power Electronics
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    • v.27 no.6
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    • pp.489-497
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    • 2022
  • This work investigates the commutation characteristics of the current flowing through an electrical-contact-type switch to the semiconductor switch branch during the breaking operation of hybrid DC switchgear. A simple, reliable, low-cost natural commutation method is proposed, and the current commutation characteristics are analyzed in accordance with the conduction voltage drop of the semiconductor switch branch through experiments. A prototype 400 V/10 A class natural commutation type hybrid DC switchgear is set up. Its performance is verified, and its characteristics are analyzed.

Structural Analysis of a PCB Substrate System for Semiconductor (반도체용 PCB 기판시스템의 구조해석)

  • Rim, Kyung-Hwa;Yang, Xun;Yoon, Jong-Kuk;Kim, Young-Kyun;Iyu, Sun-Joong
    • Journal of the Semiconductor & Display Technology
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    • v.10 no.4
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    • pp.113-118
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    • 2011
  • According to the high accuracy of semiconductor equipments, PCB substrate with much thin thickness is required. However, it is very difficult to sustain the PCB substrate without deformation in case of horizontal installation, due to low bending stiffness. In this research, new PCB process equipment with vertical installation has been developed in order to solve the problem of PCB substrate damage during etching process. As the main parts of etching system on PCB substrate, PCB substrate and JIG are analyzed through finite element method and experimental test. Through the analysis results of stress state, we could find the optimal JIG design to make the damage as low as possible.

Blazed $GxL^{TM}$ Device for Laser Dream Theater at the Aichi Expo 2005

  • Ito, Yasuyuki;Saruta, Kunihiko;Kasai, Hiroto;Nishida, Masato;Yamaguchi, Masanari;Yamashita, Keitaro;Taguchi, Ayumu;Oniki, Kazunao;Tamada, Hitoshi
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.556-559
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    • 2006
  • We successfully developed a high performance and highly reliable blazed GxL device with a high optical efficiency and a high contrast ratio. The device demonstrated superior resistance against a high power laser, which is suitable for a large-area laser projector. We operated the world's largest laser projection screen using this device at the 2005 World Exposition in Aichi, Japan, problem free.

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TFT LCD 용 Power Inductor Full Automation Winding/Welding System 개발

  • 이우영;진경복;김경수
    • Proceedings of the Korean Society Of Semiconductor Equipment Technology
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    • 2004.05a
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    • pp.154-158
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    • 2004
  • Power inductor is usually used in the field of the power circuit of a cellular phone, TFT LCD module etc.. This paper presents the development process of Power Inductor Full Automation Winding/Welding System for TFT LCD. This process, the process algorithm, high precision welding current control, design of welding head, high speed, high precision feeding mechanism, and user interface process control program technologies are included.

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