• 제목/요약/키워드: Power Semiconductor

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Design of the PHY Structure of a Voice and Data Transceiver with Security (보안성을 갖는 음성 및 데이터 트랜시버의 물리 계층 구조 설계)

  • Eun, Chang-Soo;Lom, Sun-Min;Lee, Kyoung-Min
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.43 no.10 s.352
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    • pp.46-54
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    • 2006
  • In this paper, we propose a digital transceiver that can overcome the problems which current analog transceivers have. For the proposed transceiver, we assumed a frequency resource that consists of discrete and narrow channels. We also assumed that person-to-group, group-to-group, as well as person-to-person, voice and data communications with moderate security should be devisedand the data rate is 1 Mbps with simultaneous voice and data. Frequency hewing spread spectrum (FH-SS) and differential 8-PSK (D8PSK) were adopted for security reasons and bandwidth constraints, and for the reduction of implementation complexity, respectively. For the carrier and the symbol timing recovery, the structure of the preamble was proposed based on the IEEE 802.11 FHSS frame format to improve detection probability. The computer simulation results and power budget analysis implies that the proposed system can be usedin simple wireless communications in place of such as analog walkie-talkies.

A 12b 100 MS/s Three-Step Hybrid Pipeline ADC Based on Time-Interleaved SAR ADCs

  • Park, Jun-Sang;An, Tai-Ji;Cho, Suk-Hee;Kim, Yong-Min;Ahn, Gil-Cho;Roh, Ji-Hyun;Lee, Mun-Kyo;Nah, Sun-Phil;Lee, Seung-Hoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.2
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    • pp.189-197
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    • 2014
  • This work proposes a 12b 100 MS/s $0.11{\mu}m$ CMOS three-step hybrid pipeline ADC for high-speed communication and mobile display systems requiring high resolution, low power, and small size. The first stage based on time-interleaved dual-channel SAR ADCs properly handles the Nyquist-rate input without a dedicated SHA. An input sampling clock for each SAR ADC is synchronized to a reference clock to minimize a sampling-time mismatch between the channels. Only one residue amplifier is employed and shared in the proposed ADC for the first-stage SAR ADCs as well as the MDAC of back-end pipeline stages. The shared amplifier, in particular, reduces performance degradation caused by offset and gain mismatches between two channels of the SAR ADCs. Two separate reference voltages relieve a reference disturbance due to the different operating frequencies of the front-end SAR ADCs and the back-end pipeline stages. The prototype ADC in a $0.11{\mu}m$ CMOS shows the measured DNL and INL within 0.38 LSB and 1.21 LSB, respectively. The ADC occupies an active die area of $1.34mm^2$ and consumes 25.3 mW with a maximum SNDR and SFDR of 60.2 dB and 69.5 dB, respectively, at 1.1 V and 100 MS/s.

Design and Fabrication of a Si pin Photodetector with Peak Spectral Response in the Red Light for Optical Link (적색 중심 Optical Link용 Si pin Photodetector의 설계 및 제작)

  • 장지근;김윤희;이지현;강현구;이상열
    • Journal of the Microelectronics and Packaging Society
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    • v.8 no.1
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    • pp.1-4
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    • 2001
  • We have fabricated and evaluated a new Si pin photodetector for APF optical link. The fabricated device has the $p^{+}$-guard ring around the metal-semiconductor contact and the web patterned $p^{+}$-shallow diffused region in the light absorbing area. From the measurements of electo-optical characteristics under the bias of -5 V, the junction capacitance of 4 pF and the dark current of 180 pA were obtained. The optical signal current of 1.22 $\mu$A and the responsivity of 0.55 A/W were obtained when the 2.2 $\mu$W optical power with peak wavelength of 670 nm was incident on the device. The fabricated device showed the maximum spectral response in a spectrum of 650-700 nm. It is expected that the fabricated device can be very useful for detecting the optical signal in the application of red light optics.

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Preliminary Research of CZT Based PET System Development in KAERI

  • Jo, Woo Jin;Jeong, Manhee;Kim, Han Soo;Kim, Sang Yeol;Ha, Jang Ho
    • Journal of Radiation Protection and Research
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    • v.41 no.2
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    • pp.81-86
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    • 2016
  • Background: For positron emission tomography (PET) application, cadmium zinc telluride (CZT) has been investigated by several institutes to replace detectors from a conventional system using photomultipliers or Silicon-photomultipliers (SiPMs). The spatial and energy resolution in using CZT can be superior to current scintillator-based state-of-the-art PET detectors. CZT has been under development for several years at the Korea Atomic Energy Research Institute (KAERI) to provide a high performance gamma ray detection, which needs a single crystallinity, a good uniformity, a high stopping power, and a wide band gap. Materials and Methods: Before applying our own grown CZT detectors in the prototype PET system, we investigated preliminary research with a developed discrete type data acquisition (DAQ) system for coincident events at 128 anode pixels and two common cathodes of two CZT detectors from Redlen. Each detector has a $19.4{\times}19.4{\times}6mm^3$ volume size with a 2.2 mm anode pixel pitch. Discrete amplifiers consist of a preamplifier with a gain of $8mV{\cdot}fC^{-1}$ and noise of 55 equivalent noise charge (ENC), a $CR-RC^4$ shaping amplifier with a $5{\mu}s$ peak time, and an analog-to-digital converter (ADC) driver. The DAQ system has 65 mega-sample per second flash ADC, a self and external trigger, and a USB 3.0 interface. Results and Discussion: Characteristics such as the current-to-voltage curve, energy resolution, and electron mobility life-time products for CZT detectors are investigated. In addition, preliminary results of gamma ray imaging using 511 keV of a $^{22}Na$ gamma ray source were obtained. Conclusion: In this study, the DAQ system with a CZT radiation sensor was successfully developed and a PET image was acquired by two sets of the developed DAQ system.

Analysis on the Scaling of MOSFET using TCAD (TCAD를 이용한 MOSFET의 Scaling에 대한 특성 분석)

  • 장광균;심성택;정정수;정학기;이종인
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2000.05a
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    • pp.442-446
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    • 2000
  • The metal-oxide-semiconductor field-effect transistor(MOSFET) has undergone many changes in the last decade in response to the constant demand for increased speed, decreased power, and increased parking density. Therefore, it was interested in scaling theory, and full-band Monte Carlo device simulator has been used to study the effects of device scaling on hot carriers in different MOSFET structures. MOSFET structures investigated in this study include a conventional MOSFET with a single source/drain, implant a lightly-doped drain(LDD) MOSFET, and a MOSFET built on an epitaxial layer(EPI) of a heavily-doped ground plane, and those are analyzed using TCAD(Technology Computer Aided Design) for scaling and simulation. The scaling has used a constant-voltage scaling method, and we have presented MOSFET´s characteristics such as I-V characteristic, impact ionization, electric field and recognized usefulness of TCAD, providing a physical basis for understanding how they relate to scaling.

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A Survey on the Works of Designing an SoC Platform for Smart Motor Vehicle Info-tainment (스마트 자동차 인포테인먼트 (Info-tainment) 시스템용 SoC 플랫폼 연구 동향)

  • Moon, San-Gook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.05a
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    • pp.699-701
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    • 2011
  • The Next-generation IT technology has been evolving from single technique to another which has merged, converging characteristics. The government categorized the 5 essential technologies to secure competitiveness in designing system semiconductors as smart motor vehicle info-tainment platform, smart TV multimedia system, smart phone analog interface technique, smart convergence digital communication and RF techniques, and advanced power management for smart devices. Also, it designated smart phone, smart TV, smart motor vehicle, and smart pad as the key industries. Such core techniques will become the key technologies of semiconductor design to secure the competitiveness of the next generation smart devices and the techniques can be transferred to fab-less design companies. In this contribution, we analyze the issues and the problems of the SoC design trends for smart motor vehicle info-tainment platforms.

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A Survey on the Works of Analog and Interface Technologies for Smart Phone System Integrated Circuits (스마트폰 시스템반도체를 위한 아날로그 및 인터페이스 기술과 이슈 분석)

  • Moon, San-Gook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.05a
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    • pp.668-670
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    • 2011
  • The Next-generation IT technology has been evolving from single technique to another which has merged, converging characteristics. The government categorized the 5 essential technologies to secure competitiveness in designing system semiconductors as smart motor vehicle info-tainment platform, smart TV multimedia system, smart phone analog interface technique, smart convergence digital communication and RF techniques, and advanced power management for smart devices. Also, it designated smart phone, smart TV, smart motor vehicle, and smart pad as the key industries. Such core techniques will become the key technologies of semiconductor design to secure the competitiveness of the next generation smart devices and the techniques can be transferred to fab-less design companies. In this contribution, we analyze the issues and the problems of the smart phone analog and interface techniques.

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Dry Etching Characteristics of $YMnO_3$ Thin Films Using Inductively Coupled Plasma (유도결합 플라즈마를 이용한 $YMnO_3$ 박막의 건식 식각 특성 연구)

  • 민병준;김창일;창의구
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.14 no.2
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    • pp.93-98
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    • 2001
  • YMnO$_3$ films are excellent gate dielectric materials of ferroelectric random access memories (FRAMs) with MFSFET (metal -ferroelectric-semiconductor field effect transistor) structure because YMnO$_3$ films can be deposited directly on Si substrate and have a relatively low permittivity. Although the patterning of YMnO$_3$ thin films is the requisite for the fabrication of FRAMs, the etch mechanism of YMnO$_3$ thin films has not been reported. In this study, YMnO$_3$thin films were etched with Cl$_2$/Ar gas chemistries in inductively coupled plasma (ICP). The maximum etch rate of YMnO$_3$ film is 285$\AA$/min under Cl$_2$/(Cl$_2$+Ar) of 1.0, RF power of 600 W, dc-bias voltage of -200V, chamber pressure of 15 mTorr and substrate temperature of $25^{\circ}C$. The selectivities of YMnO$_3$ over CeO$_2$ and $Y_2$O$_3$ are 2.85, 1.72, respectively. The selectivities of YMnO$_3$ over PR and Pt are quite low. Chemical reaction in surface of the etched YMnO$_3$ thin films was investigated with X-ray photoelectron spectroscopy (XPS) surface of the selected YMnO$_3$ thin films was investigated with X-ray photoelectron spectroscopy(XPS) and secondary ion mass spectrometry (SIMS). The etch profile was also investigated by scaning electron microscopy(SEM)

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Correlation between Reverse Voltage Characteristics and Bypass Diode Operation with Different Shading Conditions for c-Si Photovoltaic Module Package

  • Lim, Jong-Rok;Min, YongKi;Jung, Tae-Hee;Ahn, Jae-Hyun;Ahn, Hyung-Keun
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.5
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    • pp.577-584
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    • 2015
  • A photovoltaic (PV) system generates electricity by installing a solar energy array; therefore, the photovoltaic system can be easily exposed to external factors, which include environmental factors such as temperature, humidity, and radiation. These factors-as well as shading, in particular-lead to power degradation. When there is an output loss in the solar cell of a PV module package, the output loss is partly controlled by the bypass diode. As solar cells become highly efficient, the characteristics of series resistance and parallel resistance improve, and the characteristics of reverse voltage change. A bypass diode is connected in parallel to the string that is connected in series to the PV module. Ideally, the bypass diode operates when the voltage is -0.6[V] around. This study examines the bypass diode operating time for different types of crystalline solar cells. It compares the reverse voltage characteristics between the single solar cell and polycrystalline solar cell. Special modules were produced for the experiment. The shading rate of the solar cell in the specially made solar energy module was raised by 5% each time to confirm that the bypass diode was operating. The operation of the bypass diode is affected not only by the reverse voltage but also by the forward bias. This tendency was verified as the number of strings increased.

A 3-GSymbol/s/lane MIPI C-PHY Transceiver with Channel Mismatch Correction Circuit (채널 부정합 보정 회로를 가진 3-GSymbol/s/lane MIPI C-PHY 송수신기)

  • Choi, Seokwon;Song, Changmin;Jang, Young-Chan
    • Journal of IKEEE
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    • v.23 no.4
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    • pp.1257-1264
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    • 2019
  • A 3-GSymbol/s/lane transceiver, which supports the mobile industry processor interface (MIPI) C-physical layer (PHY) specification version 1.1, is proposed. It performs channel mismatch correction to improve the signal integrity that is deteriorated by using three-level signals over three channels. The proposed channel mismatch correction is performed by detecting channel mismatches in the receiver and adjusting the delay times of the transmission data in the transmitter according to the detection result. The channel mismatch detection in the receiver is performed by comparing the phases of the received signals with respect to the pre-determined data pattern transmitted from the transmitter. The proposed MIPI C-PHY receiver is designed using a 65 nm complementary metal-oxide-semiconductor (CMOS) process with 1.2 V supply voltage. The area and power consumption of each transceiver lane are 0.136 ㎟ and 17.4 mW/GSymbol/s, respectively. The proposed channel mismatch correction reduces the time jitter of 88.6 ps caused by the channel mismatch to 34.9 ps.