• Journal of Power Electronics
• /
• v.12 no.5
• /
• pp.769-777
• /
• 2012

In this paper, a new development in the time optimal control theory in sliding mode control systems for multi-quadrant buck converters with a variable load is presented. In general, the closed-loop time optimal control system is applied to multi-quadrant buck converters for output regulation, so that an optimal switching surface is obtained. Moreover, an adjusted optimal sliding mode controller is suggested which adjusts the controller parameters to give an optimal switching surface. In addition, a description of the transient response of the closed-loop system is proposed and used to damp any output or input disturbances in minimum time. Numerical simulations and experimental results are employed to demonstrate that the output regulation time and transient performances of dc/dc converters using the proposed technique are improved effectively when compared to the classical sliding mode control method.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.22 no.3
• /
• pp.231-239
• /
• 2017

A novel current control technique with fast response and application in an unbalanced system is proposed in this paper. Contrary to the conventional PI and dead-beat current control techniques, the proposed method is adopted to the valley current mode control (VCMC) and average current mode control (ACMC) methods to overcome the phase delay caused by conventional methods. The advantages of the proposed system are simplicity of structure and ease of implementation. The VCMC and ACMC methods are established and applied to the buck converter, boost converter, three-phase PWM converter, and three-phase inverter. The control performances of the proposed systems are shown by computer simulations and verified by experimental results.

• Proceedings of the KIEE Conference
• /
• 1993.07b
• /
• pp.886-888
• /
• 1993

Recently current mode control is widely adopted in switching power converter because of inherent stablity and ability of parallel operating. There are several ways in current mode control. One of them, peak current control is chiefly employed. Peak current mode control converter usually senses and controls peak inductor current. But there is peak-to-average current errors. Therefore peak current control needs compensation ramp correcting the errors. Average current mode control eliminates these problems, and is constructed by simple structures. This paper will describe the behavior of a simple average current mode boost converter and introduce the design techniques.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.60 no.4
• /
• pp.871-876
• /
• 2011

In this paper, a voltage-controlled frequency tunable current-mode integrator and a 3rd-order current-mode Chebyshev filter in 1.8V-$0.18{\mu}m$ CMOS is realized for software radio applications in system-on-chips. This filter is used for reconstruction purposes between a current-steering DAC and a current-mode mixer. Power consumption of the designed filter can be reduced by using a current-mode small size integrator. And also, cutoff frequency of this filter is variable between 1.2MHz and 10.1MHz, the power consumption is 2.85mW. And the voltage bias compensated circuit is used to control the voltage variation.in the designed filter.

• The KIPS Transactions:PartC
• /
• v.19C no.2
• /
• pp.135-144
• /
• 2012

All the servers in a traditional server cluster environment are kept On. If the request load reaches to the maximum, we exploit its maximum possible performance, otherwise, we exploit only some portion of maximum possible performance so that the efficiency of server power consumption becomes low. We can improve the efficiency of power consumption by controlling power mode of servers according to load situation, that is, by making On only minimum number of servers needed to handle current load while making Off the remaining servers. In the existing power mode control method, they used a static policy to decide server power mode at a fixed time interval so that it cannot adapt well to the dynamically changing load situation. In order to improve the existing method, we propose a dynamic server power control algorithm. In the proposed method, we keep the history of server power consumption and, based on it, predict whether power consumption increases in the near future. Based on this prediction, we dynamically change the time interval to decide server power mode. We performed experiments with a cluster of 30 PCs. Experimental results show that our proposed method keeps the same performance while reducing 29% of power consumption compared to the existing method. In addition, our proposed method allows to increase the average CPU utilization by 66%.

• Journal of IKEEE
• /
• v.26 no.3
• /
• pp.483-487
• /
• 2022

In this paper, we design a self-powered Arduino system for solar energy harvesting and explain its operation. To perform the operation, the Arduino system senses the amount of solar energy that changes every moment and adjusts the ratio of the active mode and sleep mode operation time according to a given solar light intensity. If the intensity of sunlight is strong enough, the Arduino system can be continuously driven in active mode and receive sufficient power from sunlight. If not, the system can run in sleep mode to minimize power consumption. As a result, it can be seen that energy consumption can be minimized by reducing power consumption by up to 81.7% when using sleep mode compared to continuously driving active mode. Also, when the light intensity is at an intermediate level, the ratio between the active mode and the sleep mode is appropriately adjusted according to the light intensity to operate. The method of self-control of the operating time ratio of active mode and sleep mode, proposed in this paper, is thought to be helpful in energy-efficient operation of the self-powered systems for wearables and bio-health applications.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.5 no.1
• /
• pp.46-53
• /
• 2000

본 논문에서는 전원전압 센서 없는 단상 PWM 컨버터의 전류제어방법을 제안한다. 제안된 방법에서 전원전압은 슬라이딩 모드 관측기에 의해 추정되며 추정된 전원전압을 이용하여 컨버터의 입력 역률을 '1'로 하고 일정한 DC링크전압을 얻을 수 있다. 제안된 방법의 특징은 전원전압의 크기와 위상의 추정이 실제전류와 추정전류의 전류오차에 의해서 얻어질 수 있다. 제안된 방법은 DSP를 이용하여 구현하고, 실험결과는 제안된 방법의 정당성을 입증한다.

• Proceedings of the KIPE Conference
• /
• 2000.07a
• /
• pp.501-504
• /
• 2000

In this paper the PC power supply is studied from the point of system stability. The power stage model of a multiple output forward converter with weighted voltage mode control is derived including all the major parasitic components and the small signal model is also derived. Determination of the weighting factors and a design procedure for the loop compensation are presented. Finally the model is verified through the simulation of three output forward converter with SABER.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.23 no.1
• /
• pp.85-91
• /
• 2009

This paper proposes a simulation method of the internal winding fault to calculate the short-circuit current, electromagnetic force and vibration mode in a distribution power transformer by using FEM program(FLUX2D) and analytic algorithm. A usage of the Transfer matrix method is also presented for the vibration mode analysis of the cable-type winding of power transformer. The equations of the winding are approximated by the series expansions of the distributed mass mode and Timoshenko's beam theory. The simulation examples are provided for the cable type winding of the transformer(22.9[kV]/220[V], 1,000[kVA]) to verify the method. The proposed Transfer Matrix Method is also verified by the ANSYS program for the vibration mode of the transformer winding. The method presented may serve as one of the useful tools in the electromagnetic force and vibration analysis of the transformer winding under the short circuit condition.

• The Journal of the Korea institute of electronic communication sciences
• /
• v.11 no.7
• /
• pp.659-664
• /
• 2016

In this paper, we suggest operational trans-conductance amplifier(OTA) for current-mode FIR filter that can be used in a digital circuit system requiring high operating frequency and low power consumption. The current-mode signal processing is one of the very innovative design method for a low power consumption system with high operating frequency because it shows a constant power regardless of frequency. From the simulation result using 0.35um CMOS process, when Vdd is 2V, it is confirmed that the proposed circuit showed the dynamic range of the about 1V, about 50% of supply voltage and output current swing of about 0~200uA. Also, the power consumption was evaluated with about 21uW and the active size for an integration was measured with $71um{\times}166um$.