• Title/Summary/Keyword: Power MOSFETs

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Charge Pump Circuits with Low Area and High Power Efficiency for Memory Applications

  • Kang, Kyeong-Pil;Min, Kyeong-Sik
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.6 no.4
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    • pp.257-263
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    • 2006
  • New charge pump circuits with low area and high power efficiency are proposed and verified in this paper. These pump circuits do not suffer the voltage stress higher than $V_{DD}$ across their pumping capacitors. Thus they can use the thin-oxide MOSFETs as the pumping capacitors. Using the thin-oxide capacitors can reduce the area of charge pumps greatly while keeping their driving capability. Comparing the new pump (NCP-2) with the conventional pump circuit using the thick-oxide capacitors shows that the power efficiency of NCP-2 is the same with the conventional one but the area efficiency of NCP-2 is improved as much as 71.8% over the conventional one, when the $V_{PP}/V_{DD}$ ratio is 3.5 and $V_{DD}$=1.8V.

Design and Characteristics of Modern Power MOSFETs for Integrated Circuits

  • Bang, Yeon-Seop
    • The Magazine of the IEIE
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    • v.37 no.8
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    • pp.50-59
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    • 2010
  • $0.18-{\mu}m$ high voltage technology 13.5V high voltage well-based symmetric EDMOS isolated by MTI was designed and fabricated. Using calibrated process and device model parameters, the characteristics of the symmetric and asymmetric EDMOS have been simulated. The asymmetric EDMOS has higher performance, better $R_{sp}$ / BVDSS figure-of-merit, short-channel immunity and smaller pitch size than the symmetric EDMOS. The asymmetric EDMOST is a good candidate for low-power and smaller source driver chips. The low voltage logic well-based EDMOS process has advantages over high voltage well-based EDMOS in process cost by eliminating the process steps of high-voltage well/drift implant, high-temperature long-time thermal steps, etc. The specific on-resistance of our well-designed logic well-based EDMOSTs is compatible with the smallest one published. TCAD simulation and measurement results show that the improved logic well-based nEDMOS has better electrical characteristics than those of the conventional one. The improved EDMOS proposed in this paper is an excellent candidate to be integrated with low voltage logic devices for high-performance low-power low-cost chips.

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IGBT Modeling and Inverter System Simulation (IGBT의 모델링과 인버터 시스템 시뮬레이션)

  • Seo, Young-Soo;Baek, Dong-Hyun;Cho, Moon-Taek;Heo, Jong-Myung;Lee, Sang-Hun
    • Proceedings of the KIEE Conference
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    • 1996.07a
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    • pp.464-466
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    • 1996
  • IGBT devices have the best features of both power MOSFETs and power bipolar transistors, i.e., efficient voltage gate drive requirements and high current density capability. When designing circuit and systems that utilize IGSTs or other power semiconductor devices, circuit simulations are needed to examine how the devices affect the behavior of the circuit. The IGBT model in this paper is verified by comparing the results of the model with experimented results for various circuit operating conditions. The model performs well and describes experimented results accurately for the range of static and dynamic condition in which the device is intended to be operated.

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A Study on Efficiency of Active Clamp Type Forward DC-DC Converter (능동 클램프형 포워드 DC-DC 컨버터의 효율에 관한 연구)

  • 안태영
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.53 no.5
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    • pp.351-357
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    • 2004
  • In this paper, we present an analytical method that provides fast and efficient evaluation of the conversion efficiency for switching power supplies. In the proposed method, the conduction losses are evaluated by calculating the effective values of the ideal current waveform first and incorporating them into an exact equivalent circuit model of the switching power supply that includes all the parasitic resistances of the circuit components. While the winding losses and core losses are accurately accounted for the magnetic components, the skin and proximity effects are assumed to be negligible in order to simplify the analysis. The validity and accuracy of the proposed method are verified with experiments on a prototype active-clamped forward converter with synchronous rectification. An excellent correlation between the experiments and theories are obtained for the input voltages of 36-75 V with 4-6 MOSFETs employed for the synchronous rectification.

Active Resonant Snubber for Ideal Switched PWM Converter (능동형 공진 스너버)

  • Moon, Gun-Woo;Lee, Jung-Hoon;Jung, Young-Seok;Youn, Myung-Joong
    • Proceedings of the KIEE Conference
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    • 1994.07a
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    • pp.412-414
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    • 1994
  • A new active resonant snubber (ARS) circuit providing the ideal switching conditions for PWM converter is presented. By using the proposed ARS circuit to PWM converters, the power switches can be operated to give zero-current and zero-voltage at both the instant of switch off and switch on, without increasing voltage/current stresses of the switches. Furthermore, the PWM converters employed ARS circuit has the advantage that it can operate at constant frequency, giving better definded EMI and filter ripple, and it is also suited for high-power application regardless of the semiconductor devices (such as MOSFETs or IGBTs) used as a power switches.

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Analysis, Design and Implementation of an Interleaved DC/DC Converter with Series-Connected Transformers

  • Lin, Bor-Ren;Chen, Chih-Chieh
    • Journal of Power Electronics
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    • v.12 no.4
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    • pp.643-653
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    • 2012
  • An interleaved DC/DC converter with series-connected transformers is presented to implement the features of zero voltage switching (ZVS), load current sharing and ripple current reduction. The proposed converter includes two half-bridge converter cells connected in series to reduce the voltage stress of the switches at one-half of the input voltage. The output sides of the two converter cells with interleaved pulse-width modulation are connected in parallel to reduce the ripple current at the output capacitor and to achieve load current sharing. Therefore, the size of the output chokes and the capacitor can be reduced. The output capacitances of the MOSFETs and the resonant inductances are resonant at the transition instant to achieve ZVS turn-on. In addition, the switching losses on the power switches are reduced. Finally, experiments on a laboratory prototype (24V/40A) are provided to demonstrate the performance of the proposed converter.

The Electrical Characteristics of MOSFET due to Misalign (Misalign에 따른 MOSFET의 전기적 특성)

  • Hong, Nung-Pyo;Kim, Won-Chul;Im, Pil-Gyu;Lee, Tae-Hoon;Hong, Jin-Woong
    • Proceedings of the KIEE Conference
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    • 1998.07d
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    • pp.1291-1293
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    • 1998
  • Power MOSFETs are very important Devices in power circuit applications such as motor control, switch mode power supplies & telecommunicatioelectronics. In order to investigated the Avalanch Energy value of MOSFET due to Misalign. Some samples made under several different $P^+$ misalign and $N^+$ misalign. The relationship between evalanch energy value and misalign is investigated as well in this paper.

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A New High Efficiency and Low Profile On-Board DC/DC Converter for Digital Car Audio Amplifiers

  • Kim Chong-Eun;Han Sang-Kyoo;Moon Gun-Woo
    • Journal of Power Electronics
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    • v.6 no.1
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    • pp.83-93
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    • 2006
  • A new high efficiency and low profile on-board DC/DC converter for digital car audio amplifiers is proposed. The proposed converter shows low conduction loss due to the low voltage stress of the secondary diodes, a lack of DC magnetizing current for the transformer, and a lack of stored energy in the transformer. Moreover, since the primary MOSFETs are turned-on under zero-voltage-switching (ZVS) conditions and the secondary diodes are turned-off under zero-current-switching (ZCS) conditions, the proposed converter has minimized switching losses. In addition, the input filter can be minimized due to a continuous input current, and an output inductor is absent in the proposed converter. Therefore, the proposed converter has the desired features, high efficiency and low profile, for a viable power supply for digital car audio amplifiers. A 60W industrial sample of the proposed converter has been implemented for digital car audio amplifiers with a measured efficiency of $88.3\%$ at nominal input voltage.

A novel ZVS interleaved totem-pole PFC converter with reduced circulating current and diode reverse recovery current (순환전류와 다이오드 역회복 전류가 작은 인터리빙 방식의 새로운 ZVS 토템폴 PFC 컨버터)

  • ;Choe, U-Jin
    • Proceedings of the KIPE Conference
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    • 2018.07a
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    • pp.189-191
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    • 2018
  • This paper introduces a novel ZVS interleaved totem-pole PFC with the reduced circulating current and the reverse recovery current of the diodes. With the help of a simple auxiliary inductor, both ZVS turn-on of the main switches and soft turn-off of the body diodes can be achieved. In the proposed totem-pole PFC topology since the switching losses and the reverse recovery losses can be significantly reduced, the typical Si MOSFETs can be employed. In addition the circulating current is reduced by adjusting the switching frequency. The proposed PFC topology can be a low cost solution to achieve high efficiency in high power PFC applications. The validity and the feasibility of the proposed topology is verified by the experimental results with a 3.3kW interleaved totem-pole PFC converter.

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