• Aerospace Engineering and Technology
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• v.11 no.1
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• pp.1-6
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• 2012

Power system in satellite is protected by installing fuses, LCLs (Latching Current Limiters), etc. between satellite power supply and loads. In this paper, the fuse sizing technique for satellite power system protection is addressed. Detailed fuse sizing method is explained and it is shown that the single fuse connection method is mathematically subordinated to the parallel fuse connection method. In addition, appropriate fuse selection method is newly suggested under a situation where exact current characteristics of a load connected to a fuse is unknown.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.10
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• pp.1835-1841
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• 2009

We analyze the problem of recloser-fuse coordination when a superconducting fault current limiter (SFCL) is installed to a power distribution system. Generally, The recloser is installed to upstream of fuse to protect against both permanent fault and temporary one appropriately. However, in a power distribution system with SFCL, the fault current is decreased by the effect of the impedance value of the SFCL and when a permanent fault occurs, the fuse may not melt during the last delay operation of the recloser because of the insufficient heat from the decreased current. Therefore, when SFCLs are applied into a power distribution system, the rating of the fuse has to be reselected to coordinate recloser to fuse effectively. To solve these problems, this paper analysed the operation of recloser-fuse coordination and presented the improved recloser-fuse coordination method in a power distribution system with SFCL using PSCAD/EMTDC.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.8_9
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• 2009

This paper shows us the analysis of the Recloser-Fuse coordination in power distribution system. Recloser has been installed with fuse to coordinate in power distribution system to protect against fault current efficiently. However, in power distribution system with SFCL, fault current couldn't be clear if occurred it as the operation of the Recloser-Fuse coordination couldn't be done. Therefore, this paper analysed the operation of the Recloser-Fuse coordination and found the method of the Recloser-Fuse coordination in power distribution system with SFCL using PSCAD/EMTDC.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.15 no.6
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• pp.3827-3831
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• 2014

This paper aims to solve the problem deterioration of power fuses. The deterioration of a power fuse is a cause of failure misoperation by a normal current flowing reduplicatively to fuse the element. An extension survey of a load feature rerating power fuse examined the power fuse deterioration removal, the cause of the deterioration of the power fuse, the front-after, and the thermal variation of the inside transformer room electric power equipment. The transformer showed an average improvement of $6[^{\circ}C]$. The temperature of the electrical line showed $7{\sim}8[^{\circ}C]$ improvement. The static condenser and direct reactor was $2{\sim}3[^{\circ}C]$ high-state maintenance the temperature and equipment syntonization relationship. In the subject of study $0.5{\sim}1.0[^{\circ}C]$ stabilizing three phase power fuse temperature differential was. Suggestion in the transformer room environment power equipment between the cause temperature happen elimination to deterioration of power fuse and temperature rise control.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.54 no.9
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• pp.391-396
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• 2005

In this paper the modeling of interrupting characteristics of a high voltage current limiting fuse to be used in a power distribution system is introduced. In order to reduce the level of energy which can be absorbed by equipment during fault current flow, a high voltage current limiting fuse can generate a high voltage at the fuse terminals. Consequently it is necessary to model and analyze precisely the voltage and current variation during a CL fuse action. The characteristics of CL fuse operation modeled by electrical components have been performed with less than 6 [$\%$] errors. So the fuse designer or manufacturer can estimate the characteristics of CL fuse operation by using this modeling. The Electro Magnetic Transient Program (EMTP) is used to develop the modeling.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.59 no.3
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• pp.499-505
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• 2010

This paper analyzed that the coordination of recloser-fuse when a superconducting fault current limiter (SFCL) is installed to a power distribution system linked small scale cogeneration system. As a rule, the recloser to properly protect against both permanent and temporary fault is installed to upstream of fuse. Therefore, in a power distribution system linked small scale cogeneration system, the fault current is increased by adding fault current of small scale Cogeneration system when a permanent fault occurs, and the fuse could melt during the first fast operation of the recloser because of more sufficient heat from the increased current. However, when SFCLs are applied into a power distribution system linked small scale cogeneration system, the coordination of recloser-fuse could be accomplished due to decreased fault current as the effect of the impedance value of the SFCL. Therefore, to solve these problems, we analysed the operation of recloser-fuse coordination in a power distribution system linked small scale cogeneration system with SFCL using PSCAD/EMTDC.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.7
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• pp.1371-1378
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• 2009

We propose a low-power eFuse one-time programmable (OTP) memory cell based on a logic process. The eFuse OTP memory cell uses separate transistors optimized at program and read mode, and reduces an operation current at read mode by reducing parasitic capacitances existing at both WL and BL. Asynchronous interface, separate I/O, BL SA circuit of digital sensing method are used for a low-power and small-area eFuse OTP memory IP. It is shown by a computer simulation that operation currents at a logic power supply voltage of VDD and at I/O interface power supply voltage of VIO are 349.5${\mu}$A and 3.3${\mu}$A, respectively. The layout size of the designed eFuse OTP memory IP with Dongbu HiTek's 0.18${\mu}$m generic process is 300 ${\times}$557${\mu}m^2$.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.64 no.3
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• pp.111-115
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• 2015

Recently, protection coordination issues can occur due to increased fault current in power system when power system being changed radial power system to grid system such as loop power system, micro grid and smart grid. This paper analyzed Recloser-Fuse coordination in loop power distribution system with Superconducting Fault Current Limiters(SFCLs) when single line ground fault occur in loop power distribution system with SFCLs. We analyzed Recloser-Fuse Coordination in radial power distribution system and changed coordination caused by increased Fault current because of loop system when single line ground fault occur in power distribution system. This paper simulated to improve changed coordination using SFCLs in loop power distribution system. Power distribution system, SFCLs and protective devices are modeled using PSCAD/EMTDC.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.2
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• pp.317-326
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• 2016

In this paper, a logic eFuse (electrical Fuse) OTP (One-Time Programmable) memory IP (Intellectual Property) using only logic transistors to reduce the development cost and period of OTP memory IPs is designed. To secure the reliability of other IPs than the OTP memory IP, a higher voltage of 2,4V than VDD (=1.5V) is supplied to only eFuse links of eFuse OTP memory cells directly through an external pad FSOURCE coming from test equipment in testing wafers. Also, an eFuse OTP memory cell of which power is supplied through FSOURCE and hence the program power is increased in a two-dimensional memory array of 128 rows by 8 columns being also able to make the decoding logic implemented in small area. The layout size of the designed 1kb eFuse OTP memory IP with the Dongbu HiTek's 110nm CIS process is $295.595{\mu}m{\times}455.873{\mu}m$ ($=0.134mm^2$).

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.8
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• pp.1877-1886
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• 2010

In this paper, we design a redundancy control circuit for 1T-SRAM repair using electrical fuse programming. We propose a dual port eFuse cell to provide high program power to the eFuse and to reduce the read current of the cell by using an external program supply voltage when the supply power is low. The proposed dual port eFuse cell is designed to store its programmed datum into a D-latch automatically in the power-on read mode. The layout area of an address comparison circuit which compares a memory repair address with a memory access address is reduced approximately 19% by using dynamic pseudo NMOS logic instead of CMOS logic. Also, the layout size of the designed redundancy control circuit for 1T-SRAM repair using electrical fuse programming with Dongbu HiTek's $0.11{\mu}m$ mixed signal process is $249.02 {\times}225.04{\mu}m^{2}$.