• Title/Summary/Keyword: Power Converter

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Large-Scale Current Source Development in Nuclear Power Plant (원전에 사용되는 직류전압제어 대전류원의 개발)

  • Jong-ho Kim;Gyu-shik Che
    • Journal of Advanced Navigation Technology
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    • v.28 no.3
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    • pp.348-355
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    • 2024
  • A current source capable of stably supplying current as a measurement medium is required in order to measure and test important facilities that require large-scale measurement current, such as a control element drive mechanism control system(CEDMCS), in case of dismantling a nuclear power plant. However, it can provides only voltage power as a source, not current, although direct voltage controlled constant current source is essential to test major equipment. That kind of source is not available to supply stable constant current regardless of load variation. It is just voltage supplier. Developing current source is not easy other than voltage source. Very large-scale current source up to ampere class more than such ten times of normal current is inevitable to test above mentioned equipment. So, we developed large-scale current source which is controlled by input DC voltage and supplies constant stable current to object equipment according to this requirement. We measured and tested nuclear power plant equipment using given real site data for a long time and afforded long period load test, and then proved its validity and verification. The developed invetion will be used future installed important equipment measuring and testing.

Development of Chip-based Precision Motion Controller

  • Cho, Jung-Uk;Jeon, Jae-Wook
    • 제어로봇시스템학회:학술대회논문집
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    • 2003.10a
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    • pp.1022-1027
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    • 2003
  • The Motion controllers provide the sophisticated performance and enhanced capabilities we can see in the movements of robotic systems. Several types of motion controllers are available, some based on the kind of overall control system in use. PLC (Programmable Logic Controller)-based motion controllers still predominate. The many peoples use MCU (Micro Controller Unit)-based board level motion controllers and will continue to in the near-term future. These motion controllers control a variety motor system like robotic systems. Generally, They consist of large and complex circuits. PLC-based motion controller consists of high performance PLC, development tool, and application specific software. It can be cause to generate several problems that are large size and space, much cabling, and additional high coasts. MCU-based motion controller consists of memories like ROM and RAM, I/O interface ports, and decoder in order to operate MCU. Additionally, it needs DPRAM to communicate with host PC, counter to get position information of motor by using encoder signal, additional circuits to control servo, and application specific software to generate a various velocity profiles. It can be causes to generate several problems that are overall system complexity, large size and space, much cabling, large power consumption and additional high costs. Also, it needs much times to calculate velocity profile because of generating by software method and don't generate various velocity profiles like arbitrary velocity profile. Therefore, It is hard to generate expected various velocity profiles. And further, to embed real-time OS (Operating System) is considered for more reliable motion control. In this paper, the structure of chip-based precision motion controller is proposed to solve above-mentioned problems of control systems. This proposed motion controller is designed with a FPGA (Field Programmable Gate Arrays) by using the VHDL (Very high speed integrated circuit Hardware Description Language) and Handel-C that is program language for deign hardware. This motion controller consists of Velocity Profile Generator (VPG) part to generate expected various velocity profiles, PCI Interface part to communicate with host PC, Feedback Counter part to get position information by using encoder signal, Clock Generator to generate expected various clock signal, Controller part to control position of motor with generated velocity profile and position information, and Data Converter part to convert and transmit compatible data to D/A converter.

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Intelligent Wheelchair System using Face and Mouth Recognition (얼굴과 입 모양 인식을 이용한 지능형 휠체어 시스템)

  • Ju, Jin-Sun;Shin, Yun-Hee;Kim, Eun-Yi
    • Journal of KIISE:Software and Applications
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    • v.36 no.2
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    • pp.161-168
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    • 2009
  • In this paper, we develop an Intelligent Wheelchair(IW) control system for the people with various disabilities. The aim of the proposed system is to increase the mobility of severely handicapped people by providing an adaptable and effective interface for a power wheelchair. To facilitate a wide variety of user abilities, the proposed system involves the use of face-inclination and mouth-shape information, where the direction of an Intelligent Wheelchair(IW) is determined by the inclination of the user's face, while proceeding and stopping are determined by the shape of the user's mouth. To analyze these gestures, our system consists of facial feature detector, facial feature recognizer, and converter. In the stage of facial feature detector, the facial region of the intended user is first obtained using Adaboost, thereafter the mouth region detected based on edge information. The extracted features are sent to the facial feature recognizer, which recognize the face inclination and mouth shape using statistical analysis and K-means clustering, respectively. These recognition results are then delivered to a converter to control the wheelchair. When assessing the effectiveness of the proposed system with 34 users unable to utilize a standard joystick, the results showed that the proposed system provided a friendly and convenient interface.

The Application of Relays for Noise Reduction in the Combat Vehicle Distribution Box (전투차량용 분배함의 노이즈 감소를 위한 릴레이 응용)

  • Kwak, Daehwan;Park, Dong Min;Oh, Eunbin;Kim, Chang Uk
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.21 no.8
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    • pp.235-240
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    • 2020
  • This study evaluated the improvements for circuits of a combat vehicle distribution box to reduce the noise generated in electromagnetic compatibility (EMC) testing. An analysis of the distribution boxes that failed the standard revealed the conducted noise generated from the converter and semiconductor switching elements on the circuit board. The distribution box transfers power from the generator and battery to the cooling system of a combat vehicle to keep turning the air conditioner on and off. Two methods were proposed to overcome this problem: a passive filter was added to the circuit board for the first method, and the converter and switching elements were replaced with the relays for the second method. Both methods were effective in reducing noise, but a greater improvement was obtained from the second method. The second method was applied to a combat vehicle system and was found to be suitable according to the EMC standards.

Fabrication and analysis of $1.3\mum$ spot-size-converter integrated laser diodes (광모드변환기가 집적된 $1.3\mum$ SC-FP-LD 제작 및 특성 해석)

  • 심종인
    • Korean Journal of Optics and Photonics
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    • v.11 no.4
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    • pp.271-278
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    • 2000
  • We have fabricated and analyzed the lasing characteristics of 1.3$\mu\textrm{m}$ Spot-Size-Converter (SSC) integrated Fabry-Perot (FP) laser diodes, which are very promising light sources for optical subscriber networks. SSC-LDs has been developed by BIB (buttjoint-built-in) coupling and selective MOVPE growth. High-performances were achieved such as the slope efficiency from the SSC facet of 0.23-0.32 mW/mA, the full-width at the half maximum of the far-field pattern (FFP) of 9.5$^{\circ}$~12.3$^{\circ}$, the alignment tolerances of $\pm$2.3$\mu\textrm{m}$ and $\pm$2.5$\mu\textrm{m}$ within the extra-coupling loss of 1 dB for the vertical and parallel directions, respectively. These experimental results were compared to theoretical ones in order to clarify the operational problems and give a good design direction of the fabricated SSC-LDs. It was revealed that an asymmetric output power from the facets, an irrelevancy of FFP and the waveguide structure around SSC facet region, and a poor temperature characteristics were originated from the scattering in the BIB and SSC sections and SHB effect in the active section for the first time.t time.

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The design of Fully Differential CMOS Operational Amplifier (Fully Differential CMOS 연산 증폭기 설계)

  • Ahn, In-Soo;Song, Seok-Ho;Choi, Tae-Sup;Yim, Tae-Soo;Sakong, Sug-Chin
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.6
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    • pp.85-96
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    • 2000
  • It is necessary that fully differential operational amplifier circuit should drive an external load in the VLSI design such as SCF(Switched Capacitor Filter), D/A Converter, A/D Converter, Telecommunication Circuit and etc. The conventional CMOS operational amplifier circuit has many problems according to CMOS technique. Firstly, Capacity of large loads are not able to operate well. The problem can be solve to use class AB stages. But large loads are operate a difficult, because an element of existing CMOS has a quadratic functional relation with input and output voltage versus output current. Secondly, Whole circuit of dynamic range decrease, because a range of input and output voltages go down according as increasing of intergration rate drop supply voltage. The problem can be improved by employing fully differential operational amplifier using differential output stage with wide output swing. In this paper, we proposed new current mirror has large output impedance and good current matching with input an output current and compared with characteristics for operational amplifier using cascoded current mirror. To obtain large output swing and low power consumption we suggest a fully differential operational amplifier. The circuit employs an output stage composed new current mirror and two amplifier stage. The proposed circuit is layout and circuit of capability is inspected through simulation program(SPICE3f).

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An 1.2V 8-bit 800MSPS CMOS A/D Converter with an Odd Number of Folding Block (홀수개의 폴딩 블록으로 구현된 1.2V 8-bit 800MSPS CMOS A/D 변환기)

  • Lee, Dong-Heon;Moon, Jun-Ho;Song, Min-Kyu
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.7
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    • pp.61-69
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    • 2010
  • In this paper, an 1.2V 8b 800MSPS A/D Converter(ADC) with an odd number of folding block to overcome the asymmetrical boundary-condition error is described. The architecture of the proposed ADC is based on a cascaded folding architecture using resistive interpolation technique for low power consumption and high input frequency. The ADC employs a novel odd folding block to improve the distortion of signal linearity and to reduce the offset errors. In the digital block, furthermore, we use a ROM encoder to convert a none-$2^n$-period code into the binary code. The chip has been fabricated with an $0.13{\mu}m$ 1P6M CMOS technology. The effective chip area is $870{\mu}m\times980{\mu}m$. SNDR is 44.84dB (ENOB 7.15bit) and SFDR is 52.17dBc, when the input frequency is 10MHz at sampling frequency of 800MHz.

Design of an 1.8V 6-bit 2GSPS CMOS ADC with an One-Zero Detecting Encoder and Buffered Reference (One-Zero 감지기와 버퍼드 기준 저항열을 가진 1.8V 6-bit 2GSPS CMOS ADC 설계)

  • Park Yu Jin;Hwang Sang Hoon;Song Min Kyu
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.6 s.336
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    • pp.1-8
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    • 2005
  • In this paper, CMOS A/D converter with 6bit 2GSPS Nyquist input at 1.8V is designed. In order to obtain the resolution of 6bit and the character of high-speed operation, we present an Interpolation type architecture. In order to overcome the problems of high speed operation, a novel One-zero Detecting Encoder, a circuit to reduce the Reference Fluctuation, an Averaging Resistor and a Track & Hold, a novel Buffered Reference for the improved SNR are proposed. The proposed ADC is based on 0.18um 1-poly 3-metal N-well CMOS technology, and it consumes 145mW at 1.8V power supply and occupies chip area of 977um $\times$ 1040um. Experimental result show that SNDR is 36.25 dB when sampling frequency is 2GHz and INL/DNL is $\pm$0.5LSB at static performance.

A Design Of Cross-Shpaed CMOS Hall Plate And Offset, 1/f Noise Cancelation Technique Based Hall Sensor Signal Process System (십자형 CMOS 홀 플레이트 및 오프셋, 1/f 잡음 제거 기술 기반 자기센서 신호처리시스템 설계)

  • Hur, Yong-Ki;Jung, Won-Jae;Lee, Ji-Hun;Nam, Kyu-Hyun;Yoo, Dong-Gyun;Yoon, Sang-Gu;Min, Chang-Gi;Park, Jun-Seok
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.5
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    • pp.152-159
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    • 2016
  • This paper describes an offset and 1/f noise cancellation technique based hall sensor signal processor. The hall sensor outputs a hall voltage from the input magnetic field, which direction is orthogonal to hall plate. The two major elements to complete the hall sensor operation are: the one is a hall sensor to generate hall voltage from input magentic field, and the other one is a hall signal process system to cancel the offset and 1/f noise of hall signal. The proposed hall sensor splits the hall signal and unwanted signals(i.e. offset and 1/f noise) using a spinning current biasing technique and chopper stabilizer. The hall signal converted to 100 kHz and unwanted signals stay around DC frequency pass through chopper stabilizer. The unwanted signals are bloked by highpass filter which, 60 kHz cut off freqyency. Therefore only pure hall signal is enter the ADC(analog to dogital converter) for digitalize. The hall signal and unwanted signal at the output of an amplifer and highpass filter, which increase the power level of hall signal and cancel the unwanted signals are -53.9 dBm @ 100 kHz and -101.3 dBm @ 10 kHz. The ADC output of hall sensor signal process system has -5.0 dBm hall signal at 100 kHz frequency and -55.0 dBm unwanted signals at 10 kHz frequency.

Development of Simulation Model for Modular Multilevel Converters Using A Dynamic Equivalent Circuit (동적 등가 회로를 이용한 MMC의 시뮬레이션 모델 개발)

  • Shin, Dong-Cheoul;Lee, Dong-Myung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.21 no.3
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    • pp.17-23
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    • 2020
  • This paper proposes a simulation model using an equivalent circuit for the development of an MMC system. The MMC has been chosen as the most suitable topology for high voltage power transmission, such as a voltage-type HVDC, and it has dozens to hundreds of sub-modules in the form of a half-bridge or full-bridge connected in series. A simulation study is essential for the development of an MMC algorithm. On the other hand, it is virtually impossible to construct and implement MMC simulation models, including hundreds or thousands of switching devices. Therefore, this paper presents an MMC equivalent model, which is easily expandable and implemented by modeling the dynamic characteristics. The voltage and current equation of the equivalent circuit was calculated using the direction of the arm current and switching signal. The model was implemented on Matlab/Simulink. In this paper, to show the validity of the model developed using Matlab/Simulink, the simulation results of a five-level MMC using the real switching element and the proposed equivalent model are shown. The validity of the proposed model was verified by showing that the current and voltage waveform in the two models match each other.