• 정보처리학회논문지A
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• 제18A권3호
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• pp.93-98
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• 2011

최근 배터리로 동작하는 임베디드 시스템의 사용이 급격히 증가하고 있지만, 현재 배터리 기술의 발전 속도는 임베디드 시스템의 전력 사용량의 증가를 따라가지 못하여, 장시간 사용을 위해서는 배터리의 크기가 커져야 하는 단점이 있다. 내장형 시스템에서 소모하는 전력량은 시스템을 구성하는 하드웨어와 시스템을 구동하는 소프트웨어에 의해 결정된다. 그러나 하드웨어적으로 저전력을 지원하더라도 운영체제 등 소프트웨어 수준에서 이를 활용하지 못하면 절전 효과를 극대화할 수 없다. 따라서 본 논문에서는 모바일 임베디드 시스템 환경에서 멀티미디어 애플리케이션 구동시 BET(Break Even Time)기반 태스크 분할을 이용하여 소비 전력을 감소시키는 스케줄링 기법을 제안한다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 ITC-CSCC -1
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• pp.179-182
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• 2000

Adiabatic dynamic CMOS logic circuits, which are called ADCL circuits, promise us to implement low power logic circuits. Since the power supply source for ADCL circuits had not been developed, we proposed a power supply circuit for them. It is shown experimentally that by using the power supply circuit ADCL circuits can work with lower power consumption than conventional static CMOS circuit. In this paper, the power supply circuit is improved so that the power consumption can be reduced. Also, it is shown by some experiments that by using the circuit, ADCL circuits can work with lower power consumption than before Improving.

• 한국멀티미디어학회논문지
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• 제15권12호
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• pp.1456-1463
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• 2012

In this paper, we study the ON/OFF control policy of base stations in two-tier heterogeneous cellular networks to minimize the total power consumption of the system. Using heterogeneous cellular networks is a potential approach of providing higher throughput and coverage compared to conventional networks with only macrocell deployment, but in fact heterogeneous cellular networks often operates regardless of total power consumption, which is a very important issue of modern cellular networks. We propose a policy that controls the activation/deactivation of base stations in heterogeneous cellular networks to minimize total power consumption. Under this policy, the total power consumed can be significantly reduced when the traffic is low while the QoS requirement is satisfied.

• 한국정보과학회:학술대회논문집
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• 한국정보과학회 2002년도 봄 학술발표논문집 Vol.29 No.1 (A)
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• pp.676-678
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• 2002

In this work, we present the novel scheduling algorithm of the multimedia data retrieval for the mobile disk drive. Our algorithm is focused on minimizing the power consumption involved in data retrieval from the local disk drive. The prime commodity in mobile devices is the electricity. Strict restriction on power consumption requirement of the mobile device put unique demand in designing of its hardware and software components. State of the art disk based storage subsystem becomes small enough to be embedded in handhold devices. It delivers abundant storage capacity and portability. However, it is never be trivial to integrate small hard disk or optical disk drive in handhold devices due to its excessive power consumption. Our algorithm ARM in this article generates the optimal schedule of retrieving data blocks from the mobile disk drive while guaranteeing continuous playback of multimedia data.

• 디지털산업정보학회논문지
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• 제8권1호
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• pp.41-46
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• 2012

In this paper, An efficient circuit design algorithm considering constraint is proposed. The proposed algorithm sets up in time constraint and area constraint, power consumption constraint for a circuit implementation. First, scheduling process for time constraint. Select the FU(Function Unit) which is satisfied with time constraint among the high level synthesis results. Analyze area and power consumption of selected FUs. Constraint set for area and power constraint. Device selection to see to setting condition. Optimization circuit implementation in selected device. The proposed algorithm compared with [7] and [8] algorithm. Therefore the proposed algorithm is proved an efficient algorithm for optimization circuit implementation.

• 환경영향평가
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• 제20권4호
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• pp.465-475
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• 2011

It is known that energy consumption in bottom floor of typical Korean-style apartment is the highest. Previous studies for energy consumption in accordance with floor level appear to be very limited due to the dependence on single energy variable such as electric power or LNG separately, based on past flat type of apartment. Acknowledging these constraints, an empirical study for a tower type emerged recently as new style of apartment in South Korea was conducted to demonstrate how a comprehensive evaluation for both electric power and LNG consumption can be used to assist in monitoring the total energy consumption in terms of floor specific settings. It was possible to identify that energy consumption in bottom floor is lesser than that of top floor, to the contrary, fact known from previous study. Also electric power consumption in top floor was identified as 15% higher than that of floor in the least. It is anticipated that this integrated utilization of electric power and LNG data would present more scientific and objective evidence for the energy load among floor level of tower type apartment by overcoming serious constraints suffered from the past single variable investigation. Ultimately, the result in this paper could be used as a valuable reference to providing priority for energy saving activities in top floor such as cool roof or green roof.

• 대한전자공학회논문지TC
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• 제44권6호
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• pp.1-8
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• 2007

한정된 배터리 전원을 사용하는 무선 센서 네트워크에서 노드의 수명유지를 위해 전력 소모량은 매우 중요한 문제이다. 전력소모를 줄이기 위해 저전력 RF 통신을 사용함으로써 무선 센서 네트워크의 에러 발생률이 증가하게 된다. 본 논문에서는 무선 센서 네트워크의 오류 정정 부호 사용과 그에 따른 전력 소모량을 분석하였다. 오류 정정 부호는 변 복조 과정에서 소모되는 저려 소모가 있지만, 부호화 이득을 통해 전송 에너지를 절약할 수 있다. 센서 노드의 특성상 전송 에너지는 프로세서의 계사에 소모되는 에너지보다 큰 비중을 차지하고 있다. 본 논문에서는 낮은 전송 전력으로 전송한 데이터를 짧은 구속장의 Viterbi 알고리즘을 적용하여 오류 정정을 할 경우 단순한 ARQ(Auto Repeat Request) 방식을 사용할 경우보다 최대 20%의 재전송 횟수의 감소와 18%의 전력 소모의 감소를 분석하였다.

• 대한전자공학회논문지SD
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• 제45권8호
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• pp.37-43
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• 2008

본 논문에서는 고속 동작에서 동적 전력 소비와 정적 전력 소비를 동시에 줄일 수 있는 self-timed current-mode Logic(STCML)을 제안한다. 제안된 로직 스타일은 펄스 신호로 가상 접지를 방전하여 로직 게이트의 누설 전류(subthreshold leakage current)를 획기적으로 감소시켰다. 또한, 본 로직은 개선된 self-timing buffer를 사용하여 동적모드 동작 시 발생되는 단락 회로 전류(short-circuit current)를 최소화하였다. 80-nm CMOS 공정을 이용하여 실시한 비교 실험 결과, 제안된 로직 스타일은 기존의 대표적인 current-mode logic인 DyCML에 비하여 동일한 시간 지연에서 26 배의 누설 전력 소비를 줄이고 27%의 동적 전력 소비를 줄일 수 있었다. 또한, 대표적인 디지털 로직 스타일인 DCVS와의 비교 결과, 59%의 누설 전력 소비감소 효과가 있었다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제12권1호
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• pp.88-98
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• 2012

In this paper, the relationship between the bandwidth (BW) and power efficiency of a source follower based (SFB) filter is quantitatively analyzed, and a design methodology for a SFB filter for optimized BW - power consumption is introduced. The proposed design methodology achieves a maximum BW at a target quality (Q) factor for the given power consumption constraint by controlling design factors individually. In order to achieve the target BW from the maximized BW, a tuning method is introduced. Through the proposed design methodology, a fourth order Butterworth filter was implemented in 0.18 ${\mu}m$ CMOS technology. The measured BW, power consumption, and IIP3 are 100 MHz, 33 ${\mu}W$, and 9 dBm, respectively. Compared with other filter structures, the measured results show high BW - power efficiency.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.851-854
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• 2003

The low power motion estimation for MPEG-4 is a soft-core for hardwired motion estimation block in MPEG-4. This motion estimation is modified by 10 difference mode. So, this motion estimation decrease a power consumption compare conventional step search. This modified 4SS Low power Motion Estimation has been tested and verified to be valid for implementation of FPGA. The average PSNR between the original image and the motion-compensated image is 28.25dB. And Power consumption is 26mW.