• 제목/요약/키워드: Power Built In Test

검색결과 186건 처리시간 0.029초

한국형 기동헬기 자체진단 시험 설계 및 입증 (Design and Verification of Built In Test For KUH)

  • 김성우;이병화;장원홍;오우섭
    • 한국항공우주학회지
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    • 제40권7호
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    • pp.623-628
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    • 2012
  • 임무탑재장비 체계는 한국형 기동헬기의 임무 수행을 위해 전자장비 구성품들을 통합한 항공전자 체계다. 자체진단 시험은 숙련된 요원, 특수 시험장비의 필요성을 감소시키주며 체계의 정비를 위한 비가동 시간을 줄여준다. 갈수록 복잡성이 증가하고 있는 항공전자 장비에 대한 자체진단 시험 기능의 필요성이 더욱 커지고 있다. 본 논문은 한국형 기동헬기 항공전자 체계에 구현한 자체진단 시험 설계 및 입증에 대해 설명한다.

차량용 Built-in 청소기용 SRM 드라이브 시스템 개발 (Development of SRM Drive System for Built-in Car Vacuum Cleaners)

  • 이영수;노정민;이대진;김재혁;선한걸;한만승
    • 전력전자학회논문지
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    • 제22권3호
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    • pp.193-198
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    • 2017
  • This paper discusses the design and control of a switched reluctance motor (SRM) drive system for a built-in car vacuum cleaner. The growing popularity of outdoor activities and recreation has led the automobile industry to expand technologies that increase the convenience of vehicles, and thus, a built-in car vacuum cleaner was introduced. However, the existing DC motor of a vacuum cleaning system has several disadvantages, such as maintenance cost and lifespan issues of its commutator-brush structure. An SRM can be a good alternative to the existing DC motor because of its high-speed capability, long lifespan, low maintenance cost, and high efficiency, among other advantages. A prototype SRM drive is designed and manufactured to verify its feasibility for use in a built-in car vacuum cleaning system. Dynamic simulation is conducted to determine the optimal switching angle for maximum efficiency and minimum torque ripple. Load test, noise measurement, and suction-power tests are also carried out.

전기시스템의 절전모드에 적용되는 PCB의 오작동 원인 개선에 관한 연구 (Study on the Causes of Malfunctions of PCBs Applied to the Power Saving Mode of Electrical Systems and its Solution)

  • 박형기;최충석
    • 한국안전학회지
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    • 제28권3호
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    • pp.51-55
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    • 2013
  • The purpose of this study is to find the causes of malfunctions and defective operation of printed circuit boards(PCBs) built into home refrigerators to perform power saving functions. This study performed an electrostatic test of a PCB built-in using an Auto Triggering system; lightning and impulse tests using an LSS-15AX; and an impulse test using an INS-400AX. From the analysis of a secondarily developed product, it was found that electrostatic discharge(ESD) caused more malfunctions and defective operations than electric overstress(EOS) due to overvoltage. As a result of increasing the condenser capacity of the PCB circuit, withstanding voltage was increased to 7.4 kV. In addition, this study changed the power saving mode and connected a varistor to the #2 pin of an IC chip. As a result, the system consisting of all specimens of a finally developed product was operated stably with an applied voltage of less than 10 kV. This study found it necessary to perform quality control at the manufacturing stage in order to reduce the occurrence of electrostatic accidents to IC chips built into a PCB.

고성능 전류감지기를 이용한 Specification 기반의 아날로그 회로 테스트 (Specification-based Analog Circuits Test using High Performance Current Sensors)

  • 이재민
    • 한국멀티미디어학회논문지
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    • 제10권10호
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    • pp.1260-1270
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    • 2007
  • 테스트 기술자들에게 아날로그 회로(또는 혼합신호 회로)의 테스트와 진단은 여전히 어려운 문제여서 이를 해결할 수 있는 효과적인 테스트 방법이 크게 요구된다. 본 논문에서는 time slot specification(TSS) 기반의 내장 전류감지기(Built-in Current Sensor)를 이용한 새로운 아날로그 회로의 테스트 기법을 제안한다. 또한 TSS에 기반 하여 고장 위치를 찾아내고 고장의 종류를 구별해 내는 방법을 제시한다. TSS 기법과 함께 제안하는 내장 전류감지기는 높은 고장 용이도와 높은 고장 검출을 그리고 아날로그 회로내 강고장과 약고장에 대한 높은 진단율을 갖는다. 제안하는 방법에서는 주출력과 전원단자등을 테스트 포인트로 사용하고 전류감지기를 자동 테스트 장치(Automatic Test Equipment)에 구성하므로써 테스트 포인트 선택과정의 복잡도를 줄일 수 있다. 내장 전류 감지기의 디지털 출력은 아날로그 IC 테스트를 위한 내장 디지털 테스트 모듈과 쉽게 연결된다.

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스캔입력 변형기법을 통한 새로운 저전력 스캔 BIST 구조 (A New Low Power Scan BIST Architecture Based on Scan Input Transformation Scheme)

  • 손현욱;김유빈;강성호
    • 대한전자공학회논문지SD
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    • 제45권6호
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    • pp.43-48
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    • 2008
  • 일반적으로 자체 테스트 동작은 입력 벡터들 사이에 상호 연관성이 없기 때문에 더 많은 전력을 소비하는 것으로 알려져 있다. 이러한 점은 회로에 손상을 유발할 뿐 아니라 배터리 수명에도 악영향을 미치기 때문에 반드시 해결되어야 할 과제 중 하나이다. 이를 위해 본 논문에서는 새로운 방식의 BIST(Built-In Self Test) 구조를 제안하여 테스트 동작에서의 천이를 감소시키고, 이를 통해 전력소모를 줄이고자 한다. 제안하는 구조에서는 LFSR(Linear Feedback Shift Register)을 통해 생성되는 pseudo-random 테스트 벡터가 스캔 경로로 들어가기 전에 3 bit씩 모아 더 적은 천이를 가지는 4 bit의 패턴으로 변형한다. 이러한 변형과 그에 대한 복원 과정은 기존의 스캔 BIST 구조에서 Bit Generator와 Bit Dropper라는 모듈을 추가하여 간단히 구현하였다. 제안하는 구조를 ISCAS'89 benchmark 회로에 적용한 결과 약 62%의 천이 감소를 확인하였고 이를 통해 제안하는 구조의 효율성을 검증하였다.

Evaluation of Underwater-Curing Coating Materials

  • Nah, Hwan-Seon;Kim, Kang-Seok;Kim, Kang-Sik;Lee, Chul-Woo;Baker, Randy
    • Corrosion Science and Technology
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    • 제8권2호
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    • pp.68-73
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    • 2009
  • An evaluation of underwater - repair coating materials was based on the premise that defective areas of the existent epoxy coating such as blistering and cracking will be repaired on spot under submerged condition. Tests include the clarification as to whether they are compatible between as-built coating and new repair coating on each concrete specimen. Candidate coating materials for repair were tested in a laboratory to scrutinize their suitability to perform the needed function satisfactorily. The qualification tests performed are as a minimum as follows: Integrated radiation tolerance test, chemical resistance test (submerged condition in deionized water), hardness test and adhesion test of the repair materials. The proper repair coating materials were selected and approved from this test results.

회로분할과 테스트 입력 벡터 제어를 이용한 저전력 Scan-based BIST 설계 (Design for Lour pouter Scan-based BIST Using Circuit Partition and Control Test Input Vectors)

  • 신택균;손윤식;정정화
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2001년도 하계종합학술대회 논문집(2)
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    • pp.125-128
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    • 2001
  • In this paper, we propose a low power Scan-based Built-ln Self Test based on circuit partitioning and pattern suppression using modified test control unit. To partition a CUT(Circuit Under Testing), the MHPA(Multilevel Hypergraph Partition Algorithm) is used. As a result of circuit partition, we can reduce the total length of test pattern, so that power consumptions are decreased in test mode. Also, proposed Scan-based BIST architecture suppresses a redundant test pattern by inserting an additional decoder in BIST control unit. A decoder detects test pattern with high fault coverage, and applies it to partitioned circuits. Experimental result on the ISCAS benchmark circuits shows the efficiency of proposed low power BIST architecture.

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시험용 이상전원(異狀電源) 발생장치의 개발에 관한 연구 (A Study on the Development of Abnormal Power Source Generator to Evaluate Electronic Appliances)

  • 박찬원;노재관
    • 산업기술연구
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    • 제24권A호
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    • pp.83-90
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    • 2004
  • Generally, electronic appliances are used on the basis of normal power source supply. The power source inevitably includes the abnormal condition, such as, sudden voltage sagging, power interrupt, and induced noises. As the electronic appliances which include micro-controller-based circuits are being increased recently, the controller circuit sometimes malfunctions by the abnormal condition of the power source. This situation causes serious problems such as hitch of electric appliance, fire and medical instrument glitch, which produces serious situations. In this paper, development of power interrupt tester which is highly suitable for an endurance test device under abnormal power source to microprocessor-based circuits is proposed 89C2051 microcontroller is performed to make power interrupt signal, and software controls peripheral hardwares and built-in functions. Experimental results of this study will offer a good application to electronic appliance maker as a test device of hardware and software debugging use.

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BID-IPM 개발에 관한 연구 (A study on the development of BID-IPM)

  • 오필경;연재을;김희준;박민희;안성윤
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2005년도 추계학술대회 논문집 전기기기 및 에너지변환시스템부문
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    • pp.158-161
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    • 2005
  • For low power motor control, there are increasing demands for compactness, cost effective and built in many functions. Hence Intelligent Power Module(IPM) is considered as an important technology in inverter-driven motor applications. Regarding BID-IPM(Built In DC/DC converter, Intelligent Power Module) newly developed to integrate NPT-IGBT, HVIC and Flyback converter in a compact package, this paper discussed design of BID-IPM and presented the experimental results by using signal source board and equivalent load test board.

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휴대형 전원 순단 시험 장치의 개발 (Development of Portable Power Interrupt Tester using Microcontroller)

  • 박찬원;노재관
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2003년도 학술회의 논문집 정보 및 제어부문 B
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    • pp.962-964
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    • 2003
  • In this paper, development of portable power interrupt tester to evaluate microprocessor based control circuits for an endurance under abnormal power source. 89C2051 micro-controller is performed to make power interrupt signal, and software controls peripheral hardwares and built-in functions. Experimental results of this study will offer a good application to electronic appliance maker as a test device of hardware and software debugging use.

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