• Title/Summary/Keyword: Power Amplifier Module

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A High Efficiency Single-Stage PFC Flyback Converter for PDP Sustaining Power Module (PDP 유지 전원단을 위한 고효율 Single-stage PFC Flyback Converter)

  • Yoo, Kwang-Min;Lim, Sung-Kyoo;Lee, Jun-Young
    • Journal of the Semiconductor & Display Technology
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    • v.5 no.3 s.16
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    • pp.11-16
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    • 2006
  • A low cost PDP sustain power supply is proposed based on flyback topology. By using Boundary Conduction Method(BCM) to control input current regulation, DCM condition can be met under all load conditions. Another feature of the proposed method is that a excessive voltage stress due to the link voltage increase can be suppressed by removing link capacitor and suggest new 'Level-shifting switch driver'. this new gate driver is improved 66% of efficiency than switching loss of a existed push-pull amplifier. The proposed converter is tested with a 400W(200V-2A output) prototype circuit.

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High-Efficiency CMOS Power Amplifier using Low-Loss PCB Balun with Second Harmonic Impedance Matching (2차 고조파 정합 네트워크를 포함하는 저손실 PCB 발룬을 이용한 고효율 CMOS 전력증폭기)

  • Kim, Hyungyu;Lim, Wonseob;Kang, Hyunuk;Lee, Wooseok;Oh, Sungjae;Oh, Hansik;Yang, Youngoo
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.30 no.2
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    • pp.104-110
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    • 2019
  • In this paper, a complementary metal oxide semiconductor(CMOS) power amplifier(PA) integrated circuit operating in the 900 MHz band for long-term evolution(LTE) communication systems is presented. The output matching network based on a transformer was implemented on a printed circuit board for low loss. Simultaneously, to achieve high efficiency of the PA, the second harmonic impedances are controlled. The CMOS PA was fabricated using a $0.18{\mu}m$ CMOS process and measured using an LTE uplink signal with a bandwidth of 10 MHz and peak to average power ratio of 7.2 dB for verification. The implemented CMOS PA module exhibits a power gain of 24.4 dB, power-added efficiency of 34.2%, and an adjacent channel leakage ratio of -30.1 dBc at an average output power level of 24.3 dBm.

SOA-Integrated Dual-Mode Laser and PIN-Photodiode for Compact CW Terahertz System

  • Lee, Eui Su;Kim, Namje;Han, Sang-Pil;Lee, Donghun;Lee, Won-Hui;Moon, Kiwon;Lee, Il-Min;Shin, Jun-Hwan;Park, Kyung Hyun
    • ETRI Journal
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    • v.38 no.4
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    • pp.665-674
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    • 2016
  • We designed and fabricated a semiconductor optical amplifier-integrated dual-mode laser (SOA-DML) as a compact and widely tunable continuous-wave terahertz (CW THz) beat source, and a pin-photodiode (pin-PD) integrated with a log-periodic planar antenna as a CW THz emitter. The SOA-DML chip consists of two distributed feedback lasers, a phase section for a tunable beat source, an amplifier, and a tapered spot-size converter for high output power and fiber-coupling efficiency. The SOA-DML module exhibits an output power of more than 15 dBm and clear four-wave mixing throughout the entire tuning range. Using integrated micro-heaters, we were able to tune the optical beat frequency from 380 GHz to 1,120 GHz. In addition, the effect of benzocyclobutene polymer in the antenna design of a pin-PD was considered. Furthermore, a dual active photodiode (PD) for high output power was designed, resulting in a 1.7-fold increase in efficiency compared with a single active PD at 220 GHz. Finally, herein we successfully show the feasibility of the CW THz system by demonstrating THz frequency-domain spectroscopy of an ${\alpha}$-lactose pellet using the modularized SOA-DML and a PD emitter.

Implementation of Front End Module for 2.4GHz WLAN Band (2.4GHz 무선랜 대역을 위한 Front End Module 구현)

  • Lee, Yun-Sang;Ryu, Jong-In;Kim, Dong-Su;Kim, Jun-Chul;Park, Jong-Dae;Kang, Nam-Kee
    • Journal of the Microelectronics and Packaging Society
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    • v.15 no.1
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    • pp.19-25
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    • 2008
  • In this paper, the front end module (FEM) was proposed for 2.4GHz WLAN band by LTCC multilayer application. The FEM was composed of power amplifier IC, switch IC, and LTCC module. LTCC module consists of output matching circuit and lowpass filter as Tx part, bandpass filter as Rx part. Design of output matching circuit for LTCC was used matching parameter from output matching circuit based on lumped circuit on the PCB board. The dielectric constant of LTCC substrate is 9. The substrate was composed of total 26 layers with each 30um thickness. Ag paste was used for the internal pattern as the conductor material. The size of the module is $4.5mm{\times}3.2mm{\times}1.4mm$. The fabricated FEM showed the gain of 21dB, ACPR of less than -31dBc first side lobe and Less than -59dBc second side lobe and the output power of 23Bm at P1dB.

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A study on Development of Actuator for Biped Walking Robot (직립보행로봇 Actuator 개발에 관한 연구)

  • Moon, Jin-Soo;Kim, Cheul-U
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.19 no.7
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    • pp.73-80
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    • 2005
  • Biped robot requires that an energy source and a control part should be installed on the body to realize active system. So, we choose the DC motor having high torque in compact size in this study. In the DC motor serve system, we choose power amplifier with analog configuration, developed the module combined the controller and the driver. We applied this module to robot actuator and studied the response characteristics in an action and a return. Main controller with serve system, loading PIC micro controller, can be load on the robot with light weight.

Phase Locked VCDRO for the 20 GHz Point-to-point Radio Link (20 GHz 고정국용 위상고정 VCDRO)

  • 주한기;장동필
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.10 no.6
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    • pp.816-824
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    • 1999
  • Design and performance of 18 GHz phase locked dielectric resonator oscillator(PLDRO) for Point-to-point radio link using analog phase locked loop is described which achieve high stability and low SSB phase noise. The module consists of an 18 GHz voltage controlled dielectric resonator oscillator(VCDRO), buffered amplifier, analog phase detector which are integrated to form a miniature hybrid circuit. In addition, containing a low phase noise VHF PLL has been designed to lock any other conventional N times frequency of crystal oscillator. The module achieves stable phase locked state, exhibits output power of 21 dBm at 18.00 GHz, -34 dBc harmonic suppression and -75 dBc/Hz phase noise at 10 kHz offset frequency from carrier.

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Novel RF front-end circuit for CDMA based PCS phone (CDMA방식의 PCS 전화기를 위한 새로운 방식의 고주파 전위회로에 관한 연구)

  • 윤기호;박한규
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.23 no.6
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    • pp.1602-1609
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    • 1998
  • In this paper, the design and implementation of the novel RF front end circuit for CDMA based PCS phone is described. This novel scheme is realized by building the power amplifier module combined with duplexer. The dielectric filters which are parts of duplexer are broken up and relocated into the module. Electromagnetic analysis for via holes and coupling between narrow transmissio lines is icluded to design a circuit. The combined moule has been minimaturized to be as small as 1.5CC. It has satisfied IS-95 requirements for linearity performances of CDMA signal at 24-dBm output power as well as played apart as a duplexer. The operating current of about 95mA has been saved owing to both rearranging dielectric filters and limiting operating point to class-B by considering real working power range of CDMA phones.

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BUC Design and Fabrication for Flyaway Satellite Terminal (운반형 위성단말 고출력 상향 주파수변환기 설계 및 제작)

  • Kim, Joo-Yeon;Shin, Kwan-Ho
    • Journal of IKEEE
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    • v.24 no.1
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    • pp.72-80
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    • 2020
  • This paper describes the design and fabrication of a BUC(Block Up-converter) which is a component of a FST (Flyaway Satellite Terminal), one of the ET(Earth Terminal) of the military satellite. BUC is physically composed of an up-converter module, a high power amplifier module, a receive band suppression filter, a housing, and a cable assembly. It was designed using simulator AWR to satisfy the electrical characteristics of BUC's such as maximum output power, gain, unwanted signal, and intermodulation. The maximum output power and gain characteristics were measured at 43.4dBm and 51.8dB, respectively. The unwanted wave and intermodulation characteristics were -73.5dBc and -31.9dBc, respectively. Of the electrical requirements of Table 1, not only the above four but also all of the items were confirmed to be satisfied.

V-band Self-heterodyne Wireless Transceiver using MMIC Modules

  • An, Dan;Lee, Mun-Kyo;Lee, Sang-Jin;Ko, Du-Hyun;Jin, Jin-Man;Kim, Sung-Chan;Kim, Sam-Dong;Park, Hyun-Chang;Park, Hyung-Moo;Rhee, Jin-Koo
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.5 no.3
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    • pp.210-219
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    • 2005
  • We report on a low-cost V-band wireless transceiver with no use of any local oscillator in the receiver block using a self-heterodyne architecture. V-band millimeter-wave monolithic IC (MMIC) modules were developed to demonstrate the wireless transceiver using coplanar waveguide (CPW) and GaAs PHEMT technologies. The MMIC modules such as the MMIC low noise amplifier (LNA), medium power amplifier (MPA) and the up/down-mixer were installed in the transceiver system. To interface the MMIC chips with the component modules for the transceiver system, CPW-to-waveguide fin-line transition modules of WR-15 type were designed and fabricated. The fabricated LNA modules showed a $S_{21}$ gain of 8.4 dB and a noise figure of 5.6 dB at 58 GHz. The MPA modules exhibited a gain of 6.9 dB and a $P_{1dB}$ of 5.4 dBm at 58 GHz. The conversion losses of the up-mixer and the down-mixer module were 14.3 dB at a LO power of 15 dBm, and 19.7 dB at a LO power of 0 dBm, respectively. From the measurement of V-band wireless transceiver, a conversion gain of 0.2 dB and a $P_{1dB}$ of 5.2 dBm were obtained in the transmitter block. The receiver block showed a conversion gain of 2.1 dB and a $P_{1dB}$ of -18.6 dBm. The wireless transceiver system demonstrated a successful data transfer within a distance of 5 meters.

Implementation of Small Size Dual Band PAM using LTCC Substrates (LTCC를 이용한 Small Size Dual Band PAM의 구현)

  • Shin, Yong-Kil;Chung, Hyun-Chul;Lee, Joon-Geun;Kim, Dong-Su;Yoo, Jo-Shua;Yoo, Myong-Jae;Park, Seong-Dae;Lee, Woo-Sung
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.07a
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    • pp.357-358
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    • 2005
  • Compact power amplifier modules (PAM) for WCDMA/KPCS and GSM/WCDMA dual-band applications based on multilayer low temperature co-fired ceramic (LTCC) substrates are presented in this paper. The proposed modules are composed of an InGaP/GaAs HBT PAs on top of the LTCC substrates and passive components such as RF chokes and capacitors which are embedded in the substrates. The overall size of the modules is less than 6mm $\times$ 6mm $\times$ 0.8mm. The measured result shows that the PAM delivers a power of 28 dBm with a power added efficiency (PAE) of more than 30 % at KPCS band. The adjacent-channel power ratio (ACPR) at 1.25-MHz and 2.25-MHz offset is -44dBc/30kHz and -60dBc/30kHz, respectively, at 28-dBm output power. Also, the PAM for WCDMA band exhibits an output power of 27 dBm and 32-dB gain at 1.95 GHz with a 3.4-V supply. The adjacent-channel leakage ratio (ACLR) at 5-MHz and 10-MHz offset is -37.5dBc/3.84MHz and -48dBc/3.84MHz, respectively. The measured result of the GSM PAM shows an output power of 33.4 dBm and a power gain of 30.4 dB at 900MHz with a 3.5V supply. The corresponding power added efficiency (PAE) is more than 52.6 %.

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