• Applied Science and Convergence Technology
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• 제26권6호
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• pp.189-194
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• 2017

Effects of gas injection scheme and rf driving current configuration in a dual turn inductively coupled plasma (ICP) system were analyzed by 3D numerical simulation using CFD-ACE+. Injected gases from a tunable gas nozzle system (TGN) having 12 horizontal and 12 vertical nozzles showed different paths to the pumping surface. The maximum velocity from the nozzle reached Mach 2.2 with 2.2 Pa of Ar. More than half of the injected gases from the right side of the TGN were found to go to the pump without touching the wafer surface by massless particle tracing method. Gases from the vertical nozzle with 45 degree slanted angle soared up to the hottest region beneath the ceramic lid between the inner and the outer rf turn of the antenna. Under reversed driving current configuration, the highest rf power absorption region were separated into the two inner islands and the four peaked donut region.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.424-424
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• 2009

그라핀은 밴드갭이 없어서 세미메탈의 성질을 띠므로 초고속 RF 소자에는 응용이 가능하지만, 현재 사용되는 반도체 칩에 사용하기가 불가능하다. 그러나 그라핀을 매우 좁은 리본 형태로 만들 경우 밴드갭이 생기고 이에 따라 반도체특성을 뛰게 된다. 이러한 특성은 시뮬레이션을 통해서만 이해되다가 2007년 P. Kim이 그라핀 나노리본의 밴드캡이 리본의 폭이 좁아짐에 따라 증가함을 실험적으로 최초로 발표하였다. 하지만 그라핀을 나노리본형태로 식각 방법에 대해서는 정확히 연구되지 않았다. 따라서 본 연구에서는 $O_2$ plasma ashing 방법을 이용하여 그라핀을 식각하는 방법에 대해 연구하였다. 먼저 Si기판을 initial cleaning 한 후, highly-oriented pyrolytic graphite(HOPG)를 이용하여 기존의 mechanical exfoliation 방식을 통해 그라핀을 형성하였다. Photo-lithography 방법을 통하여 패터닝한 후, 그라핀을 식각하기 위하여 Reactive Ion Etcher (RIE) system을 이용한 $O_2$ plasma ashing을 50 W에서 1 분간 실시하였다. 다시 image reverse photo-lithography 과정과 E-beam evaporator system를 통해서 Al 전극을 형성하여 graphene-FET를 제작하였고, 광학 현미경과 AFM (Atomic force microscope)을 통해 두께를 확인하였다. 본 연구를 통하여 $O_2$ plasma ashing을 이용하여 쉽게 그라 E을 식각할 수 있음을 확인 하였으며, 제작된 소자의 전기적 특성에 대해서 현재 실험중에 있다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.284-284
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• 2011

Recently, the increasing degree of device integration in the fabrication of Si semiconductor devices, etching processes of nano-scale materials and high aspect-ratio (HAR) structures become more important. Due to this reason, etch selectivity control during etching of HAR contact holes and trenches is very important. In this study, The etch selectivity and etch rate of TEOS oxide layer using ACL (amorphous carbon layer) mask are investigated various process parameters in CH2F2/C4F8/O2/Ar plasma during etching TEOS oxide layer using ArF/BARC/SiOx/ACL multilevel resist (MLR) structures. The deformation and etch characteristics of TEOS oxide layer using ACL hard mask was investigated in a dual-frequency superimposed capacitively coupled plasma (DFS-CCP) etcher by different fHF/ fLF combinations by varying the CH2F2/ C4F8 gas flow ratio plasmas. The etch characteristics were measured by on scanning electron microscopy (SEM) And X-ray photoelectron spectroscopy (XPS) analyses and Fourier transform infrared spectroscopy (FT-IR). A process window for very high selective etching of TEOS oxide using ACL mask could be determined by controlling the process parameters and in turn degree of polymerization. Mechanisms for high etch selectivity will discussed in detail.

• Transactions on Electrical and Electronic Materials
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• 제10권2호
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• pp.35-39
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• 2009

A novel Helmholtz coil inductively coupled plasma(H-ICP) etcher is proposed and characterized for deep nano-scale CMOS technology. Various hardware tests are performed while varying key parameters such as distance between the top and bottom coils, the distance between the chamber ceiling and the wafer, and the chamber height in order to determine the optimal design of the chamber and optimal process conditions. The uniformity was significantly improved by applying the optimum conditions. The plasma density obtained with the H-ICP source was about $5{\times}10^{11}/cm^3$, and the electron temperature was about 2-3 eV. The etching selectivity for the poly-silicon gate versus the ultra-thin gate oxide was 482:1 at 10 sccm of $HeO_2$. The proposed H-ICP was successfully applied to form multiple 60-nm poly-silicon gate layers.

• 반도체디스플레이기술학회지
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• 제13권3호
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• pp.39-43
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• 2014

The effect of electrode charging on the ion energy distribution (IED) was investigated in the dual-frequency capacitively coupled plasma source which was powered of 100 MHz RF at the top electrode and 400 kHz bias on the bottom electrode. The charging property was analyzed with the distortion of the measured current and voltage waveforms. The capacitance and the resistance of electrode sheath can change the property of ion and electron charging on the electrode so it is sensitive to the plasma density which is controlled by the main power. The ion energy distribution was estimated by equivalent circuit model, being compared with the measured distribution obtained from the ion energy analyzer. Results show that the low frequency bias power changes effectively the low energy population of ion in the energy distribution.

• 반도체디스플레이기술학회지
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• 제20권3호
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• pp.32-38
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• 2021

We developed an inductively coupled plasma (ICP) etcher for GaN etching using a parallel plasma electrode source with a multifunctional chuck matched to it in order for the low power consumption and low process cost in comparison with the conventional ICP system with a helical-type plasma electrode source. The optimization process condition using it for the micro light-emitting diode (µ-LED) chip fabrication was established, which is an ICP RF power of 300 W, a chuck power of 200 W, a BCl₃/Cl₂ gas ratio of 3:2. Under this condition, the mesa structure with the etch depth over 1 ㎛ and the etch angle over 75° and also with no etching residue was obtained for the µ-LED chip. The developed ICP showed the improved values on the process pressure, the etch selectivity, the etch depth uniformity, the etch angle profile and the substrate temperature uniformity in comparison with the commercial ICP. The µ-LED chip fabricated using the developed ICP showed the similar or improved characteristics in the L-I-V measurements compared with the one fabricated using the conventional ICP method

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.68-68
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• 2011

As feature size is smaller, new technology are needed in semiconductor factory such as gap-fill technology for sub 100nm, development of ALD equipment for Cu barrier/seed, oxide trench etcher technology for 25 nm and beyond, development of high throughput Cu CMP equipment for 30nm and development of poly etcher for 25 nm and so on. We are focus on gap-fill technology for sub-30nm. There are many problems, which are leaning, over-hang, void, micro-pore, delaminate, thickness limitation, squeeze-in, squeeze-out and thinning phenomenon in sub-30 nm gap fill. New gap-fill processes, which are viscous oxide-SOD (spin on dielectric), O3-TEOS, NF3 Based HDP and Flowable oxide have been attempting to overcome these problems. Some groups investigated SOD process. Because gap-fill performance of SOD is best and process parameter is simple. Nevertheless these advantages, SOD processes have some problems. First, material cost is high. Second, density of SOD is too low. Therefore annealing and curing process certainly necessary to get hard density film. On the other hand, film density by Flowable oxide process is higher than film density by SOD process. Therefore, we are focus on Flowable oxide. In this work, dielectric film were deposited by PECVD with TSA(Trisilylamine - N(SiH3)3) and NH3. To get flow-ability, the effect of plasma treatment was investigated as function of O2 plasma power. QMS (quadruple mass spectrometry) and FTIR was used to analysis mechanism. Gap-filling performance and flow ability was confirmed by various patterns.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2005년도 ICCAS
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• pp.519-524
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• 2005

A numerical process to simulate SiO2 dry etching with inductively coupled C2F6 plasmas has been constructed using a commercial CFD code as a first step to design a run-to-run control system. The simulator was tuned to reasonably predict the reactive ion etching behavior and used to investigate the effects of plasma operating variables on the etch rate and uniformity. The relationship between the operating variables and the etching characteristics was mathematically modeled through linear regression for future run-to-run control system design.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.499-499
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• 2012

This study was evaluated on etcher of capacitive coupled plasmas with OES (Optical Emission Spectroscopy) and impedance by VI probe that are widely used for process control and monitoring at semiconductor industry. The experiment was operated at conventional Ar and C4F8 plasma with variable change such as pressure and addition of gas (Atmospheric Leak: N2 and O2), RF, pressure, that are highly possible to impact wafer yield during wafer process, in order to observe OES and VI Probe signals. The sensitivity change on OES and Impedance by Vi probe was analyzed by statistical method to determine healthy of process. The main goal of this study is to understand unwanted tool performance to eventually improve productive capability. It is important for process engineers to actively adjust tool parameter before any serious problem occurs.

• 한국표면공학회지
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• 제34권5호
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• pp.516-521
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• 2001

Dry etching of Si wafer and $SiO_2$ layers was performed using He/Cl$_2$ mixture plasma by diode-type reactive ion etcher (RIE) system. For Si etching, the Cl molecules react with the Si molecules on the surface and become chemically stable, indicating that the reactants need energetic ion bombardment. During the ion assisted desorption, energetic ions would damage the photoresist (PR) and produce the bad etch Si-profile. Moreover, we have examined the characteristics of the Cl-Si reaction system, and developed the new fabrication procedures with a $Cl_2$/He mixture for Si and $SiO_2$-etching. The developed novel fabrication procedure allows the RIE to be unexpensive and useful a Si deep etching system. Since the etch rate was proved to increase linearly with fHe and the selectivity of Si to $SiO_2$ etch rate was observed to be inversely proportional to fHe.