• Title/Summary/Keyword: Pitch Array

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A Design of Embedded LED Display Board Module and Control Unit which the Placement of Pixels is Free (픽셀 배치가 자유로운 임베디드 LED 전광판 모듈 및 제어장치 설계)

  • Lee, Bae-Kyu;Kim, Jung-Hwa
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.10
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    • pp.135-141
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    • 2013
  • In this paper, we installed three high brightness red, green, and blue LED in one socket and made one pixel unit. And we also developed the full-color display board module and control unit which can express various images such as text, graphics, video image with the combination of pixel units and a number of modules. LED display driver module have a driver circuit within the combination of the RGB pixel dot on unit area. These modules of the existing form can be high priced because of implementation a fixed resolution in specific space and installation space. To overcome these shortcomings, we developed a LED driver and LED pixel modules free in array at random pitch intervals. Display board module of this paper enabled to display smoothly video image which have many data processing quantity through dragging data speed up 36 frames per second. Also there are an effect which is provided more clear image because of improving the flickering of the existing display board.

Thermal Analysis and Design of AlGaInP-based Light Emitting Diode Arrays

  • Ban, Zhang;Liang, Zhongzhu;Liang, Jingqiu;Wang, Weibiao;JinguangLv, JinguangLv;Qin, Yuxin
    • Current Optics and Photonics
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    • v.1 no.2
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    • pp.143-149
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    • 2017
  • LED arrays with pixel numbers of $3{\times}3$, $4{\times}4$, and $5{\times}5$ have been studied in this paper in order to enhance the optical output power and decrease heat dissipation of an AlGaInP-based light emitting diode display device (pixel size of $280{\times}280{\mu}m$) fabricated by micro-opto-electro-mechanical systems. Simulation results showed that the thermal resistances of the $3{\times}3$, $4{\times}4$, $5{\times}5$ arrays were $52^{\circ}C/W$, $69.7^{\circ}C/W$, and $84.3^{\circ}C/W$. The junction temperature was calculated by the peak wavelength shift method, which showed that the maximum value appears at the center pixel due to thermal crosstalk from neighboring pixels. The central temperature would be minimized with $40{\mu}m$ pixel pitch and $150{\mu}m$ substrate thickness as calculated by thermal modeling using finite element analysis. The modeling can be used to optimize parameters of highly integrated AlGaInP-based LED arrays fabricated by micro-opto-electro-mechanical systems technology.

A 2.5-V, 1-Mb Ferroelectric Memory Design Based on PMOS-Gating Cell Structure (PMOS 게이팅 셀 기반 2.5-V, 1-Mb 강유전체 메모리 설계)

  • Kim, Jung-Hyun;Chung, Yeonbae
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.10 s.340
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    • pp.1-8
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    • 2005
  • In this paper, a FRAM design style based on PMOS-gating cell structure is described. The memory cell consists of a PMOS access transistor and a ferroelectric capacitor. Its plate is grounded. The proposed scheme employs three novel operating methods: 1) $V_{DD}$ precharged bitline, 2) negative-voltage wordline technique and 3) negative-pulse restore, Because this configuration doesn`t need the on-pitch plate control circuitry, it is effective in realizing cost-effective chip sizes. Implementation for a 2.5-V, 1-Mb FRAM prototype design in a $0.25-{\mu}m$, triple-well technology shows a chip size of $3.22\;mm^{2}$, an access time of 48 ns and an active current of 11 mA. The cell efficiency is 62.52 $\%$. It has gained approximately $20\;\%$ improvement in the cell array efficiency over the conventional plate-driven FRAM scheme.

A Study on the DBS Receive Tracking Antenna Apparatus on a Ship by the Az/El Mount (Az/El 마운트에 의한 선박용 DBS 수신추적안테나 장치에 관한 연구)

  • 최조천;양규식
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.1 no.2
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    • pp.209-220
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    • 1997
  • DBS offers actual services to mass-media and communication system of very broad region in information society. Especially, the DBS is the only system to access TV broadcasting service on a sailing ship. But the ship's DBS receiver is required a complex antenna tracking system because ships are under complex moving such as pitch, roll, and yaw etc. This study is motivated to develop a tracking antenna system to receive the koreasat on small silo ship. Therefore, this system is researched to small size, light weight, simple operation, and low cost of the product. The mount structure have been a compact size and easy operation to the Az/El 2-axis type which is operated by step motor. And it is very useful on a ship in the around sea of korean peninsula. The antenna has a plate type of micro-strip array, and is a domestic production. The vibration sensor is selected to gyro sensor of ultra-sonic rate type for ship's moving control. Tracking method is used the step-tracking algorithm, and the ship's moving compensation is adapted to the closed loop control method by ship's moving detection of gyro sensor. Tracking test is operated by the ship's moving simulator, we examined the actual receiving state on sailing shipboard in the near sea of korean peninsular.

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Effects of Cutting Parameters on Surface Roughness in Planing Using Taguchi Method (다구찌 실험 계획법을 활용한 평삭 가공에서의 표면 거칠기에 대한 절삭조건 영향 분석)

  • Seo, Dong-Hyun;Kwon, Ye-Pil;Kim, Young-Jae;Choi, Hwan-Jin;Jeon, Eun-chae
    • Journal of the Korean Society of Manufacturing Process Engineers
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    • v.20 no.8
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    • pp.93-98
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    • 2021
  • The complex effects of the machining parameters make it is difficult to control and predict surface roughness. The theoretical surface roughness observed during mechanical machining with a round tool is determined by the tool radius and pitch. However, it was revealed that other parameters, such as the depth of cut and cutting speed, also affect surface roughness. This study adapted the Taguchi method, which can analyze the effects of cutting parameters quantitatively with an efficient number of experiments, to optimize the parameters for better surface roughness. Experiments were designed based on an orthogonal array, and the quantitative effects on the surface roughness were analyzed using the S/N ratio. The surface roughness was affected by all parameters, especially the tool radius. The optimum cutting parameter values obtained in this study showed better surface roughness than the other combinations of the parameters.

Evaluation of Image Qualities for a Digital X-ray Imaging System Based on Gd$_2$O$_2$S(Tb) Scintillator and Photosensor Array by Using a Monte Carlo Imaging Simulation Code (몬테카를로 영상모의실험 코드를 이용한 Gd$_2$O$_2$S(Tb) 섬광체 및 광센서 어레이 기반 디지털 X-선 영상시스템의 화질평가)

  • Jung, Man-Hee;Jung, In-Bum;Park, Ju-Hee;Oh, Ji-Eun;Cho, Hyo-Sung;Han, Bong-Soo;Kim, Sin;Lee, Bong-Soo;Kim, Ho-Kyung
    • Journal of Biomedical Engineering Research
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    • v.25 no.4
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    • pp.253-259
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    • 2004
  • in this study, we developed a Monte Carlo imaging simulation code written by the visual C$\^$++/ programing language for design optimization of a digital X-ray imaging system. As a digital X-ray imaging system, we considered a Gd$_2$O$_2$S(Tb) scintillator and a photosensor array, and included a 2D parallel grid to simulate general test renditions. The interactions between X-ray beams and the system structure, the behavior of lights generated in the scintillator, and their collection in the photosensor array were simulated by using the Monte Carlo method. The scintillator thickness and the photosensor array pitch were assumed to 66$\mu\textrm{m}$ and 48$\mu\textrm{m}$, respertively, and the pixel format was set to 256 x 256. Using the code, we obtained X-ray images under various simulation conditions, and evaluated their image qualities through the calculations of SNR (signal-to-noise ratio), MTF (modulation transfer function), NPS (noise power spectrum), DQE (detective quantum efficiency). The image simulation code developed in this study can be applied effectively for a variety of digital X-ray imaging systems for their design optimization on various design parameters.

Development of Position Encoding Circuit for a Multi-Anode Position Sensitive Photomultiplier Tube (다중양극 위치민감형 광전자증배관을 위한 위치검출회로 개발)

  • Kwon, Sun-Il;Hong, Seong-Jong;Ito, Mikiko;Yoon, Hyun-Suk;Lee, Geon-Song;Sim, Kwang-Souk;Rhee, June-Tak;Lee, Dong-Soo;Lee, Jae-Sung
    • Nuclear Medicine and Molecular Imaging
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    • v.42 no.6
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    • pp.469-477
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    • 2008
  • Purpose: The goal of this paper is to present the design and performance of a position encoding circuit for $16{\times}16$ array of position sensitive multi-anode photomultiplier tube for small animal PET scanners. This circuit which reduces the number of readout channels from 256 to 4 channels is based on a charge division method utilizing a resistor array. Materials and Methods: The position encoding circuit was simulated with PSpice before fabrication. The position encoding circuit reads out the signals from H9500 flat panel PMTs (Hamamatsu Photonics K.K., Japan) on which $1.5{\times}1.5{\times}7.0\;mm^3$ $L_{0.9}GSO$ ($Lu_{1.8}Gd_{0.2}SiO_{5}:Ce$) crystals were mounted. For coincidence detection, two different PET modules were used. One PET module consisted of a $29{\times}29\;L_{0.9}GSO$ crystal layer, and the other PET module two $28{\times}28$ and $29{\times}29\;L_{0.9}GSO$ crystal layers which have relative offsets by half a crystal pitch in x- and y-directions. The crystal mapping algorithm was also developed to identify crystals. Results: Each crystal was clearly visible in flood images. The crystal identification capability was enhanced further by changing the values of resistors near the edge of the resistor array. Energy resolutions of individual crystal were about 11.6%(SD 1.6). The flood images were segmented well with the proposed crystal mapping algorithm. Conclusion: The position encoding circuit resulted in a clear separation of crystals and sufficient energy resolutions with H9500 flat-panel PMT and $L_{0.9}GSO$ crystals. This circuit is good enough for use in small animal PET scanners.

Study on Surface Morphology Control of Electroless Ni-P for Reliability Improvement of Solder Joints (솔더 조인트 신뢰성 향상을 위한 무전해 니켈-도금의 표면형상 제어)

  • Lee, Dong-Jun;Choi, Jin-Won;Cho, Seung-Hyun
    • Journal of the Microelectronics and Packaging Society
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    • v.15 no.3
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    • pp.27-33
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    • 2008
  • With increasing use of portable appliances such as PDA and cellular phone, changing environment of applications requires higher solder joint reliability. The ENIG (Electroless Nickel Immersion Gold) process has been widely used for fine pitch SMT (Surface Mount Technology) and BGA (Ball Grid Array) packaged devices due to its benefits including excellent solderability, high uniformity and substantial legibility throughout the packaging process. Its brittle fracture of solder, however, has received increasingly attentions. It was Down that fracture brittleness is mainly related with black pad resulting from galvanic nickel corrosion and P-enriched layer formation between the IMC (Intermetallic Compounds) and electroless nickel layer. Theoretically, smooth electroless Ni layer was blown to have a advantages in minimizing the black pad phenomenon by uniform solution exchange during immersion gold plating. Nevertheless, how to control the surface morphology of electroless Ni layer has been hardly blown. This study investigates an effect of surface morphology of Cu underlayer on surface morphology of electroless Ni layer. To obtain various kinds of surface morphology of Cu layer, two types of Cu etching chemical and a number of Cu etching treatment were applied.

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Reflow Behavior and Board Level BGA Solder Joint Properties of Epoxy Curable No-clean SAC305 Solder Paste (에폭시 경화형 무세정 SAC305 솔더 페이스트의 리플로우 공정성과 보드레벨 BGA 솔더 접합부 특성)

  • Choi, Han;Lee, So-Jeong;Ko, Yong-Ho;Bang, Jung-Hwan;Kim, Jun-Ki
    • Journal of the Microelectronics and Packaging Society
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    • v.22 no.1
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    • pp.69-74
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    • 2015
  • With difficulties during the cleaning of reflow flux residues due to the decrease of the part size and interconnection pitch in the advanced electronic devices, the need for the no-clean solder paste is increasing. In this study, an epoxy curable solder paste was made with SAC305 solder powder and the curable flux of which the main ingredient is epoxy resin and its reflow solderability, flux residue corrosivity and solder joint mechanical properties was investigated with comparison to the commercial rosin type solder paste. The fillet shape of the cured product around the reflowed solder joint revealed that the curing reaction occurred following the fluxing reaction and solder joint formation. The copper plate solderability test result also revealed that the wettability of the epoxy curable solder paste was comparable to those of the commercial rosin type solder pastes. In the highly accelerated temperature and humidity test, the cured product residue of the curable solder paste showed no corrosion of copper plate. From FT-IR analysis, it was considered to be resulted from the formation of tight bond through epoxy curing reaction. Ball shear, ball pull and die shear tests revealed that the adhesive bonding was formed with the solder surface and the increase of die shear strength of about 15~40% was achieved. It was considered that the epoxy curable solder paste could contribute to the improvement of the package reliability as well as the removal of the flux residue cleaning process.

Experimental Study on Pressure Loss of Flow Parallel to Rod Bundle with Spacer Grid (지지격자가 있는 봉다발과 축방향으로 평행한 유동의 압력손실에 관한 실험적 연구)

  • Lee, Chi-Young;Shin, Chang-Hwan;Park, Ju-Yong;In, Wang-Kee
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.36 no.7
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    • pp.689-695
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    • 2012
  • The friction factor in a rod bundle and the loss coefficient at a spacer grid were examined. As a test section, 25 smooth rods, 9.5 mm in diameter and 2000 mm in length, were prepared and installed in a $5{\times}5$ square array in a square channel. In this case, the P/D (Pitch-to-Diameter ratio) was 1.35. In this work, plain (i.e., no mixing vanes), split-vane, and hybrid-vane spacer grids were tested. In a bare rod bundle (i.e., no spacer grid), the measured friction factors were in good agreement with the previous correlations. Among the spacer grids tested, the hybrid-vane spacer grid presented the largest friction factor in the rod bundle and loss coefficient. This may be because of the flow pattern change induced by large relative plugging of the flow cross section and mixing vane geometry. At Re=$5{\times}10^5$, the predicted loss coefficients of plain, splitvane, and hybrid-vane spacer grids were approximately 0.79, 0.80, and 0.88, respectively.