• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.123-124
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• 2006

본 연구에서는 KOH 용액을 사용한 Si 습식 이방성 식각실험 진행 후, 나타나는 표면의 거친 현상을 완화하는 데에 중점을 두고 연구를 진행하였다. 이를 위해 $SiO_2$ 웨이퍼 위에 Photo-lithography 공정으로 형성시킨 PMER 패턴을 Mask로 사용하여 HF 용액으로 $SiO_2$를 식각시켰으며, 형성된 $SiO_2$를 Mask로 사용하여 KOH 용액으로 Si을 식각시켰다. 이 때, KOH와 혼합하는 용액으로 IPA와 Ethan이을 각각 사용하여 실험을 진행하였으며, ESEM을 이용하여 표면을 비교하였다.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2003.06a
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• pp.219-222
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• 2003

Self-Assembled Monolayers(SAMs) by alkanethiol adsorption to thin metal film are widely being investigated for applications as coating layer for anti-stiction or friction reduction and in fabrication of micro structure of molecular and bio molecular. Recently, there have been many researches on micro patterning using the advantages of very thin thickness and etching resistance in selective etching of thin metal film of Self- Assembled Monolayers. In this report, we present the micromachining thin metal film by Mask-Less laser patterning of alknanethiolate Self-Assembled Monolayers.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.10
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• pp.752-758
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• 2010

The etching characteristics of indium tin oxide (ITO) thin films in an $O_2/BCl_3/Ar$ plasma were investigated. The etch rate of ITO thin films increased with increasing $O_2$ content from 0 to 2 sccm in $BCl_3$/Ar plasma, whereas that of ITO decreased with increasing $O_2$ content from 2 sccm to 6 sccm in $BCl_3$/Ar plasma. The maximum etch rate of 65.9 nm/m in for the ITO thin films was obtained at 2 sccm $O_2$ addition. The etch conditions were the RF power of 500 W, the bias power of 200 W, the process pressure of 15 mTorr, and the substrate temperature of $40^{\circ}C$. The analysis of x-ray photo electron spectroscopy (XPS) was carried out to investigate the chemical reactions between the surfaces of ITO thin films and etch species.

• Journal of the Korean Society for Precision Engineering
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• v.22 no.1
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• pp.199-206
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• 2005

Mask manufacturing is a high COC and COO process in developing of semiconductor devices because of mask production tool with high resolution. Direct writing has been thought to be the one of the patterning method to cope with development or small-lot production of the device. This study consists two categories. One is the additional process of the direct and maskless patterning generation using SLA for easy and convenient application and the other is a removal process using wet-etching process. In this study, cured status of epoxy pattern is most important parameter because of the beer-lambert law according to the diffusion of UV light. In order to improve the contact force between patterns and substrate, prime process was performed and to remove the semi-cured resin which makes a bad effects to the pattern, spin cleaning process using TPM was also performed. At a removal process, contact force between photo-curable resin as an etching mask and Si wafer is important parameter.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07b
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• pp.906-911
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• 2004

In this paper, we used only PR as etching mask, while it used usually Cr/AU as etching mask, and in order to fabricate a photosensor has the increased sensitivity, we investigated on the sensitivity of general type and p-i-n type diode. we designed microchannel size width max 10um, min 5um depth max 10um, reservoir size max 100um, min 2mm. Fabrication of microfluidic devices in glass substrate by glass wet etching methods and glass to glass fusion bonding. The p-i-n diode has higher sensitivity than photodiode. Considering these results, we fabricated p-i-n diodes on the high resistive($4k{\Omega}{\cdot}cm$) wafer into rectangle and finger pattern and compared internal resistance of each pattern. The internal resistance of p-i-n diode can be decreased by the application of finger pattern has parallel resistance structure from $571\Omega$ to $393\Omega$.

• Journal of the Semiconductor & Display Technology
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• v.9 no.4
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• pp.25-29
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• 2010

We have investigated the effect of surface roughness of TCO substrate on the characteristics of OLED (organic light emitting diodes) devices. In order to control the surface roughness of AZO thin films, we have processed photo-lithography and reactive ion etching. The micro-size patterned mask was used, and the etching depth was controlled by changing etching time. The surface morphology of the AZO thin film was observed by FESEM and atomic force microscopy (AFM). And then, organic materials and cathode electrode were sequentially deposited on the AZO thin films. Device structure was AZO/${\alpha}$-NPD/DPVB/$Alq_3$/LiF/Al. The DPVB was used as a blue emitting material. The electrical characteristics such as current density vs. voltage and luminescence vs. voltage of OLED devices were measured by using spectrometer. The current vs. voltage and luminance vs. voltage characteristics were systematically degraded with increasing surface roughness. Furthermore, the retention test clearly presented that the reliability of OLED devices was directly influenced with the surface roughness, which could be interpreted in terms of the concentration of the electric field on the weak and thin organic layers caused by the poor step coverage.

• Journal of the Semiconductor & Display Technology
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• v.19 no.3
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• pp.55-60
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• 2020

The hard mask photo-resist strip inspection system for the semiconductor wafer manufacturing process inspects the position of the circuit pattern formed on the wafer by measuring the distance from the edge of the wafer to the strip processing area. After that, it is an inspection system that enables you to check the process status in real time. Process defects can be significantly reduced by applying a tester that has not been applied to the existing wafer strip process, edge etching process, and wafer ashing process. In addition, it is a technology for localizing semiconductor process inspection equipment that can analyze the outer diameter of the wafer and the state of pattern formation, which can secure process stability and improve wafer edge yield.

• Proceedings of the Materials Research Society of Korea Conference
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• 2009.05a
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• pp.12.1-12.1
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• 2009

For the micro conductive line, memory device fabrication process use many expensive processes such as manufactur-ing of photo mask, coating of photo resist, exposure, development, and etching. However, direct printing technology has the merits about simple and cost effective processes because nano-metal particles contained inks are directly injective without mask. And also, this technology has the advantage about fabrication of fine pattern line on various substrates such as FPCB, PCB, glass, polymer and so on. In this work, we have fabricated the fine and thick metal pattern line on flexible PCB substrate for the next generation electronic circuit using Ag nano-particles contained ink. To improve the line tolerance on flexible PCB, metal lines are fabricated by sequential prinitng method. Sequential printing method has vari-ous merits about fine, thick and high resolution pattern lines without bulge.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.191-191
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• 2007

By employing a photo-sensitive PVA as a photoresist, we first demonstrated simultaneous patterning and passivation of P3HT active layer. The passivation layers were obtained by annealing the organic layers after developing PVA and over-etching the P3HT layer. The fabricated OTFTs were electrically characterized. The OTFTs after the passivation exhibited the field-effect of ${\sim}5.9{\times}10^{-4}cm^2/V{\cdot}s$, on/off current ratio of ${\sim}10^3$. The value of OTFTs a little degradation with time in air but it appeared different unpassivated OTFT.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.460-460
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• 2012

반도체 Device가 Shrink 함에 따라 Pattern Size가 작아지게 되고, 이로 인해 Photo Resist 물질 자체만으로는 원하는 Patterning 물질들을 Plasma Etching 하기가 어려워지고 있다. 이로 인해 Photoresist를 대체할 Hard Mask 개념이 도입되었으며, 이 Hardmask Layer 중 Amorphous Carbon Layer 가 가장 널리 사용되고 지고 있다. 이 Amorphous Carbon 계열의 Hardmask를 Etching 하기 위해서 기본적으로 O2 Plasma가 사용되는데, 이 O2 Plasma 내의 Oxygen Species들이 가지는 등 방성 Diffusion 특성으로 인해, 원하고자 하는 미세 Pattern의 Vertical Profile을 얻는데 많은 어려움이 있어왔다. 이를 Control 하기 인해 O2 Plasma Parameter들의 변화 및 Source/Bias Power 등의 변수가 연구되어 왔으며, 이와 다른 접근으로, N2 및 CO, CO2, SO2 등의 여러 Additive Gas 들의 첨가를 통해 미세 Pattern의 Profile을 개선하고, Plasma Etching 특성을 개선하는 연구가 같이 진행되어져 왔다. 본 논문에서 VLSI Device의 Masking Layer로 사용되는, Carbon 계 유기 층의 Plasma 식각 특성에 대한 연구를 진행하였다. Plasma Etchant로 사용되는 O2 Plasma에 새로운 첨가제 가스인 카르보닐 황화물 (COS) Gas를 추가하였을 시 나타나는 Plasma 내의 변화를 Plasma Parameter 및 IR 및 XPS, OES 분석을 통하여 규명하고, 이로 인한 Etch Rate 및 Plasma Potential에 대해 비교 분석하였다. COS Gas를 정량적으로 추가할 시, Plasma의 변화 및 이로 인해 얻어지는 Pattern에서의 Etchant Species들의 변화를 통해 Profile의 변화를 Mechanism 적으로 규명할 수 있었으며, 이로 인해 기존의 O2 Plasma를 통해 얻어진 Vertical Profile 대비, COS Additive Gas를 추가하였을 경우, Pattern Profile 변화가 개선됨을 최종적으로 확인 할 수 있었다.