• Journal of Power Electronics
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• v.9 no.5
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• pp.691-699
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• 2009

This paper presents the analysis of series active power filter for reactive power compensation, load balancing, harmonic elimination, and neutral current eradication in three-phase four-wire power systems. Generally, the three-phase four-wire system is widely employed in distributing electric energy to several office building and manufacturing plants. In such systems, the third harmonic and its 3rd harmonics are termed as triple and zero sequence components that do not cancel each other in the system neutral. Consequently, the triple harmonics add together creating a primary source of excessive neutral current. Regarding this concern, this paper presents a new control algorithm for a series hybrid active system, whereas the control approach it adopts directly influence its compensation characteristics. Hence, the advantage of this control algorithm is the direct extraction of compensation voltage reference without phase transformations and multiplying harmonic current value by gain and the required rating of the series active filter is much smaller than that of a conventional shunt active power filter. In order to show the effectiveness of the proposed control algorithm, experiments have been carried out.

• 제어로봇시스템학회:학술대회논문집
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• 1990.10b
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• pp.1108-1111
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• 1990

Sorce noise effect in 1.5 Mach-Zehnder (MZ) interferometer is analyzed. It is shown numerically that with fine adjustments to the feedback gain and initial phase biases, the operating point of the interferometer to achives common mode compensation can be made to lie in a region where the measurand sensitivity is greater than it would be in a conventional Mach-Zehnder interferometer even if the source is less coherent.

• The Transactions of the Korean Institute of Power Electronics
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• v.18 no.3
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• pp.232-239
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• 2013

This paper proposes an improved stator flux estimator through ensuring conventional PLPF to act as a pure integrator for sensorless control of induction motors. Conventional PLPF uses the estimated synchronous speed as a cut-off frequency and has the gain and phase compensators. The gain and phase compensators are determined on the assumption that the estimated synchronous angular speed is coincident with the real speed. Therefore, if the synchronous angular speed is not same as the real speed, the gain and phase compensation will not be appropriate. To overcome the problem of conventional PLPF, this paper analyzes the relationship between the synchronous speed error and the phase lag error of the stator flux. Based on the analysis, this paper proposes the synchronous speed error compensation scheme. To achieve a start-up without speed sensor, the current model is used as the stator flux estimator at the standstill. When the motor starts up, the current model should be switched into the voltage model. So a stable transition between the voltage model and the current model is required. This paper proposes the simple transition method which determines the initial values of the voltage model and the current model at the transition moment. The validity of the proposed schemes is proved through the simulation results and the experimental results.

• Proceedings of the KIEE Conference
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• 1999.11b
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• pp.251-254
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• 1999

This paper presents the basic tuning method for PSS control parameters. This method includes the phase compensation and root-locus based gain tuning for one machine with infinite bus system. At the tuning condition and least stable condition, the effect of gain tuning is also discussed.

• Proceedings of the KIEE Conference
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• 2005.07a
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• pp.319-322
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• 2005

This paper describes practical tuning methods and testing of a digital PSS, which uses both frequency and power, with the 220MVA Chungpyung P/P #1 in the KEPCO system to enhance the damping of local modes. In the first step, the objective phase of PSS is computed through a phase leading function to provide compensation between the exciter reference point and the generator air-gap torque before tuning the PSS's time constants. In addition, eigenvalue analysis was used to determine a range of PSS's gain, whichis the more useful for field testing rather than a single gain value. The Real-Time Digital Simulator was used to verify safe operations of the PSS in the presence of disturbances, such as AVR step and three phase fault.

• ETRI Journal
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• v.36 no.1
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• pp.12-21
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• 2014

In this paper, we propose a new digital blind in-phase/quadrature-phase (I/Q) mismatch compensation technique for image rejection in a direct-conversion receiver (DCR). The proposed image-rejection circuit adopts DC offset cancellation and a sign-sign least mean squares (LMS) algorithm with a unique step size adaptation both for a fast and precise I/Q mismatch estimation. In addition, several performance-optimizing design considerations related to accuracy, speed, and hardware simplicity are discussed. The implementation of the proposed circuit in an FPGA results in an image-rejection ratio (IRR) of 65 dB, which is the best performance with modulated signals, along with an adaptation time of 0.9 seconds, which is a tenfold increase in the compensation speed as compared to previously reported circuits. The proposed technique will be a promising solution in the area of image rejection to increase both the speed and accuracy of future DCRs.

• Transactions on Electrical and Electronic Materials
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• v.17 no.3
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• pp.172-177
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• 2016

Miller feedback compensation is introduced in a low dropout regulator (LDO) in order to obtain a capacitor-free regulator and improve the fast transient response. The conventional LDO has a limited bandwidth because of the large-size output capacitor and parasitic gate capacitance in the power MOSFET. In order to obtain a stable frequency response without the output capacitor, LDO is designed with resistor-capacitor (R-C) compensation and this is achieved with a connection between the gain-stage and the power MOS. An R-C compensator is suggested to provide a pole and zero to improve the stability. The proposed LDO is designed with the 0.35 μm CMOS process. Simulation testing shows that the phase margin in the Bode plot indicates a stable response, which is over 100^o. In the load regulation, the transient time is within 55 μs when the load current changes from 0.1 to 1 mA.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.25 no.8
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• pp.114-121
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• 2011

This paper, as the second part of the paper, dealt with the field test and test results to validate PSS(Power System Stabilizer) parameters which are previously tuned in Part 1 paper. In Part 1 of the paper, the selection of parameters such as lead-lag time constants for phase compensation and system gain was optimized by using linear & eigenvalue analyses and they were verified through the time-domain transient stability analysis. In part 2, the performance of PSS was finally verified by the generator's on-line field test. Through the comparisons of simulation results and measured data before and after tuning of the PSS, the models of generator and its controllers including AVR, Governor and PSS used in the simulation are verified and confirmed.

• The Transactions of the Korean Institute of Power Electronics
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• v.26 no.1
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• pp.46-52
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• 2021

This study proposes a feedforward compensation control method to reduce 120 Hz output voltage ripple in a single-phase AC/DC rectifier system composed of PFC and LLC resonant converters. The proposed method compensates for the voltage ripple of the DC-link by using the AC input and DC output power difference, and then reduces the final output voltage ripple component of 120 Hz through feedforward compensation based on the linearized frequency gain curve of the LLC resonant converter. Through simulation and experimental results, the validity of the ripple reduction performance was verified by comparing the conventional PI controller and the proposed feedforward compensation method.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.12C
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• pp.1029-1034
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• 2010

For All Digital QPSK receivers, a phase recovery scheme is required to fix the arbitrarily rotated I/Q quadrature signals due to the transmission path and clock mismatch between the transmitter and the receiver. The conventional Costas phase recovery loop scheme requires a separate AGC(Automatic Gain Control) to obtain the performance independent of input signal power. This paper proposes a simple scheme which separates the phase and amplitude of the input signal via CORDIC algorithm and performs the phase recovery and amplitude compensation simultaneously. The proposed scheme can considerably reduce the logic resources in hardware implementation, has been verified by C++ and Model Sim simulations.