• International journal of advanced smart convergence
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• v.8 no.1
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• pp.9-17
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• 2019

In this article, we present a performance enhancement scheme for mobile applications by adopting persistent memory. The proposed scheme supports the deadline guarantee of real-time applications like a video player, and also provides reasonable performances for non-real-time applications. To do so, we analyze the program execution path of mobile software platforms and find two sources of unpredictable time delays that make the deadline-guarantee of real-time applications difficult. The first is the irregular activation of garbage collection in flash storage and the second is the blocking and time-slice based scheduling used in mobile platforms. We resolve these two issues by adopting high performance persistent memory as the storage of real-time applications. By maintaining real-time applications and their data in persistent memory, I/O latency can become predictable because persistent memory does not need garbage collection. Also, we present a new scheduler that exclusively allocates a processor core to a real-time application. Although processor cycles can be wasted while a real-time application performs I/O, we depict that the processor utilization is not degraded significantly due to the acceleration of I/O by adopting persistent memory. Simulation experiments show that the proposed scheme improves the deadline misses of real-time applications by 90% in comparison with the legacy I/O scheme used in mobile systems.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.22 no.1
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• pp.71-76
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• 2022

Buffer cache bridges the performance gap between memory and storage, but its effectiveness is limited due to periodic flush, performed to prevent data loss in smartphones. This paper shows that selective flushing technique with small persistent memory can reduce the flushing overhead of smartphone buffer cache significantly. This is due to our I/O analysis of smartphone applications in that a certain hot data account for most of file writes, while a large proportion of file data incurs single-writes. The proposed selective flushing policy performs flushing to persistent memory for frequently updated data, and storage flushing is performed only for single-write data. This eliminates storage write traffic and also improves the space efficiency of persistent memory. Simulations with popular smartphone application I/O traces show that the proposed policy reduces write traffic to storage by 24.8% on average and up to 37.8%.

• Journal of KIISE
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• v.43 no.2
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• pp.152-162
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• 2016

Most traditional garbage collectors commonly use the language level metadata, which is designed for pointer type searching. However, because it is difficult to use this metadata in non-volatile memory allocation platforms, a new garbage collection technique is essential for non-volatile memory utilization. In this paper, we design new metadata for managing information regarding non-volatile memory allocation called "Allocation Tree". This metadata is comprised of tree data structure for fast information lookup and a node that holds an allocation address and an object ID pair in key-value form. The Garbage Collector starts collecting when there are insufficient non-volatile memory spaces, and it compares user data and the allocation tree for garbage detection. We develop this algorithm in a persistent heap based non-volatile memory allocation platform called "HEAPO" for demonstration.

• Journal of KIISE
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• v.44 no.2
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• pp.132-138
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• 2017

We design and implement a process-based fault recovery system to increase the reliability of new memory based computer systems. A rollback point is made at every context switch to which a process can rollback to upon a fault. In this study, a clone process of the original process, which we refer to as a P-process (Persistent-process), is created as a rollback point. Such a design minimizes losses when a fault does occur. Specifically, first, execution loss can be minimized as rollback points are created only at context switches, which bounds the lost execution. Second, as we make use of the COW (Copy-On-Write）mechanism, only those parts of the process memory state that are modified (in page units) are copied decreasing the overhead for creating the P-process. Our experimental results show that the overhead is approximately 5% in 8 out of 11 PARSEC benchmark workloads when P-process is created at every context switch time. Even for workloads that result in considerable overhead, we show that this overhead can be reduced by increasing the P-process generation interval.

• 대한약리학회:학술대회논문집
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• 2006.10a
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• pp.83.2-83.2
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• 2006

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.54 no.10
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• pp.615-619
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• 2005

Token coherence protocol has many good reasons against snooping/directory-based protocol in terms of latency, bandwidth, and complexity. Token counting easily maintains correctness of the protocol without global ordering of request which is basis of other dominant cache coherence protocols. But this lack of global ordering causes starvation which is not happening in snooping/directory-based protocols. Token coherence protocol solves this problem by providing an emergency mechanism called persistent request. It enforces other processors in the competition (or accessing same shared memory block, to give up their tokens to feed a starving processor. However, as the number of processors grows in a system, the frequency of starvation occurrence increases. In other words, the situation where persistent request occurs becomes too frequent to be emergent. As the frequency of persistent requests increases, not only the cost of each persistent matters since it is based on broadcasting to all processors, but also the increased traffic of persistent requests will saturate the bandwidth of multiprocessor interconnection network. This paper proposes a new request mechanism that defines order of requests to reduce occurrence of persistent requests. This ordering mechanism has been designed to be decentralized since centralized mechanism in both snooping-based protocol and directory-based protocol is one of primary reasons why token coherence protocol has advantage in terms of latency and bandwidth against these two dominant Protocols.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.23 no.3
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• pp.107-111
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• 2023

Journaling techniques are widely used to maintain a consistent file system state in the event of a system crash. As existing journaling techniques are designed for block storage such as HDDs, they are not efficient for byte-addressable persistent memory media. This paper proposes a metadata journaling technique for in-memory file systems that has the ability of avoiding inconsistent file system states in crash situations. The proposed journaling technique reduces a large amount of writing by making use of the byte-addressable feature of memory media and bypasses heavy software I/O stack. Experimental results with the IOzone benchmark show that the proposed journaling technique improves the performance of Ext4 by 49.2% on average.

• Journal of Platform Technology
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• v.11 no.4
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• pp.50-61
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• 2023

The advancement of various big data technologies has had a tremendous impact on many industries. Diverse big data research studies have been conducted to process and analyze massive data quickly. Under these circumstances, new emerging technologies such as high-capacity persistent memory (PMEM) and Compute Express Link (CXL) have lately attracted significant attention. However, little investigation into a big data "search" platform has been made. Moreover, most big data software platforms have been still optimized for traditional DRAM-based computing systems. This paper first evaluates the basic performance of Intel Optane PMEM, and then investigates both indexing and searching performance of Elasticsearch, a widely-known enterprise big data search platform, on the PMEM-based computing system to explore its effectiveness and possibility. Extensive and comprehensive experiments shows that the proposed Optane PMEM-based Elasticsearch achieves indexing and searching performance improvement by an average of 1.45 times and 3.2 times respectively compared to DRAM-based system. Consequently, this paper demonstrates the high I/O, high-capacity, and nonvolatile PMEM-based computing systems are very promising for big data search platforms.

• Electronics and Telecommunications Trends
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• v.35 no.3
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• pp.55-65
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• 2020

With the development of nonvolatile memory technology, Intel has released the Optane datacenter persistent memory module (DCPMM) that can be deployed in the dual in-line memory module. The results of research and experiments on Optane DCPMMs are significantly different from the anticipated results in previous studies through emulation. The DCPMM can be used in two different modes, namely, memory mode (similar to volatile DRAM: Dynamic Random Access Memory) and app direct mode (similar to file storage). It has buffers in 256-byte granularity; this is four times the CPU (Central Processing Unit) cache line (i.e., 64 bytes). However, these properties are not easy to use correctly, and the incorrect use of these properties may result in performance degradation. Optane has the same characteristics of DRAM and storage devices. To take advantage of the performance characteristics of this device, operating systems and applications require new approaches. However, this change in computing environments will require a significant number of researches in the future.

• IMMUNE NETWORK
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• v.15 no.4
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• pp.186-190
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• 2015

Cytomegalovirus (CMV) infection in healthy individuals is usually asymptomatic and results in latent infection. CMV reactivation occasionally occurs in healthy individuals according to their immune status over time. T cell responses to CMV are restricted to a limited number of immunodominant epitopes, as compared to responses to other chronic or persistent viruses. This response results in progressive, prolonged expansion of CMV-specific $CD8^+$ T cells, termed 'memory inflation'. The expanded CMV-specific $CD8^+$ T cell population is extraordinarily large and is more prominent in the elderly. CMV-specific $CD8^+$ T cells possess rather similar phenotypic and functional features to those of replicative senescent T cells. In this review, we discuss the general features of CMV-specific inflationary memory T cells and the factors involved in memory inflation.