• Journal of Korea Society of Digital Industry and Information Management
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• v.5 no.3
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• pp.141-145
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• 2009

In this paper, we propose an efficient lossless compression algorithm using spatial and temporal information. The proposed method obtains higher lossless compression of images than other lossless compression techniques. It is divided into two parts, a motion adaptation based predictor part and a residual error coding part. The proposed nonlinear predictor can reduce prediction error by learning from its past prediction errors. The predictor decides the proper selection of the spatial and temporal prediction values according to each past prediction error. The reduced error is coded by existing context coding method. Experimental results show that the proposed algorithm has better performance than those of existing context modeling methods.

• Journal of KIISE
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• v.44 no.5
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• pp.486-495
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• 2017

Collaborative Filtering is limited because of the cost that is required to perform the recommendation (such as the time complexity and space complexity). The RFWBP (Rating Frequency Weight-based Baseline Predictor) that approximates the precision of the existing methods is one of the efficiency methods to reduce the cost. But, the following issues need to be considered regarding the RFWBP: 1) It does not reduce the error because the RFWBP does not learn for the recommendation, and 2) it recommends all of the items because there is no condition for an appropriate recommendation list when only the RFWBP is used for the achievement of efficiency. In this paper, the BBP (Bias-Based Predictor) is proposed to solve these problems. The BBP reduces the error range, and it determines some of the cases to make an appropriate recommendation list, thereby forging a recommendation list for each case.

• Journal of KIISE:Computing Practices and Letters
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• v.8 no.1
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• pp.107-115
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• 2002

We propose a new hybrid value predictor which achieves high performance by combining several predictors. Because the proposed hybrid value predictor can update the prediction table speculatively, it efficiently reduces the number of mispredicted instructions due to stale data. Also, the proposed predictor can enhance the prediction accuracy and efficiently decrease the hardware cost of predictor, because it allocates instructions into the best-suited predictor during instruction fetch stage by using the information of static classification which is obtained from the profile-based compiler implementation. For the 16-issue superscalar processors, simulation results based on the SimpleScalar/PISA tool set show that we achieve the average prediction rates of 73% by using speculative update and the average prediction rates of 88% by adding static classification for the SPECint95 benchmark programs.

• Journal of KIISE:Computer Systems and Theory
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• v.28 no.11
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• pp.601-612
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• 2001

In superscalar processors, value prediction is a technique that breaks true data dependences by predicting the outcome of an instruction in order to exploit instruction level parallelism(ILP). A value predictor looks up the prediction table for the prediction value of an instruction in the instruction fetch stage, and updates with the prediction result and the resolved value after the execution of the instruction for the next prediction. However, as the instruction fetch and issue rates are increased, the same instruction is likely to fetch again before is has been updated in the predictor. Hence, the predictor looks up the stale value in the table and this mostly will cause incorrect value predictions. In this paper, a stride value predictor with the capability of speculative updates, which can update the prediction table speculatively without waiting until the instruction has been completed, is proposed. Also, the performance of the scheme is examined using Simplescalar simulator for SPECint95 benchmarks in which our value predictor is added.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.2
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• pp.208-222
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• 2015

For the performance-efficient integration of IPs on an SoC utilizing heterochronous multi-clock domains, we propose a synchronization scheme that causes low latency overhead when data are crossing clock boundaries. The proposed synchronization scheme is composed of a clock predictor and a synchronizer. The clock predictor of a sender clock domain produces a predicted clock that is used in a receiver clock domain to detect possible synchronization failures in advance. When the possible synchronization failures are detected, a synchronizer at the receiver delays data-capture times to avoid the possible synchronization failures. From the simulation of the proposed scheme through SPICE modeling using a Chartered $0.18{\mu}m$ CMOS process, we verified the functionalities and timing behavior of the clock predictor and the synchronizer. The simulation results show that the clock predictor produces a predicted clock before a synchronization failure, and the synchronizer samples data correctly using the predicted clock.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.11
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• pp.2503-2510
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• 2012

This paper proposes a parallel operation intra predictor for H.264/AVC decoder. In previous intra predictor design, common operation units were designed for 17 prediction modes in order to compute more effectively. However, it was designed by analyzing the equation applied to one pixel. So, there are four operation units for computing 16 pixels in a $4{\times}4$ block and they need four cycles. In this paper, the proposed intra predictor contains T3(Three Type Transform) operation unit for parallel operation. It divides 17 modes into 3 types to calculate 16 pixels of a $4{\times}4$ block in only one cycle and needs 16 cycles minimum in 16x16 block. As the result of the experiment, in terms of processing cycle, the performance of proposed intra predictor is 58.95% higher than the previous one.

• International Journal of Control, Automation, and Systems
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• v.6 no.2
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• pp.186-193
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• 2008

The Internet's low cost and ubiquity present an attractive option for real-time distributed control of processes on the factory floor. When integrated with the Internet, the LonWorks open control network can give ubiquitous accessibility with the distributed control nature of information on the factory floor. One of the most important points in real-time distributed control of processes is timely response. There are many processes on the factory floor that require timely response. However, the uncertain time delay inherent in the network makes it difficult to guarantee timely response in many cases. Especially, the transmission characteristics of the LonWorks/IP network show a highly stochastic nature. Therefore, the time delay problem has to be resolved to achieve high performance and quality of the real-time distributed control of the process in the LonWorks/IP Virtual Device Network (VDN). It should be properly predicted and compensated. In this paper, a new distributed control scheme that can compensate for the effects of the time delay in the network is proposed. It is based on the PID controller augmented with the Smith predictor and disturbance observer. Designing methods for output feedback filter and disturbance observer are also proposed. Tracking position control experiment of a geared DC Servo motor is performed using the proposed control method. The performance of the proposed controller is compared with that of the Internal Model Controller (IMC) with the Smith predictor. The result shows that the performance is improved and guaranteed by augmenting a PID controller with both the Smith predictor and disturbance observer under the stochastic time delay in the LonWorks/IP VDN.

• Journal of the Korea Society of Computer and Information
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• v.14 no.10
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• pp.1-10
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• 2009

Precise branch predictor has a profound impact on system performance in modern processor architectures. Recent works show that prediction latency as well as prediction accuracy has a critical impact on overall system performance as well. However, prediction latency tends to be overlooked. In this paper, we propose Branch Pre-Prediction policy to tolerate branch prediction latency. The proposed solution allows that branch predictor can proceed its prediction without any information from the fetch engine, separating the prediction engine from fetch stage. In addition, we propose newly modified BTE structure to support our solution. The simulation result shows that proposed solution can hide most prediction latency with still providing the same level of prediction accuracy. Furthermore, the proposed solution shows even better performance than the ideal case, that is the predictor which always takes a single cycle prediction latency. In our experiments, IPC improvement is up to 11.92% and 5.15% in average, compared to conventional predictor system.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.46 no.6
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• pp.73-79
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• 2009

For the shake of control for movement object, control theory like neural network, nonlinear model predictive control(NMPC) is realized on digital high speed computer. Predictor of flight control system(FCS) based nonlinear model predictive control has to be satisfied with response for hard real-time to perform applications on each module in the FCS. Simultaneously, It gives a serious consideration accuracy to give full play to FCS's performance. Error of mathematical aspect affects realization of whole algorithm. But factors of bring mathematical error is not considered to calculate final accuracy on parameter of predictor. In this paper, Predictor was made using load control model on the digital computer for design FCS at hard real-time and is shown response time on realization algorithm. And is shown realization algorithm of high effective predictor over the accuracy. The predictor was realized on the load control model using Euler method, Heun method, Runge-Kutta and Taylor method.

• Journal of Institute of Control, Robotics and Systems
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• v.11 no.9
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• pp.755-760
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• 2005

This paper proposes an improved implementation algorithm for the continuous-time receding horizon control (RHC). The proposed algorithm has a feature that it has better control performance than the existing algorithm. Main idea of the proposed algorithm is that we can approximate the original RHC problem better by assuming the predicted input trajectory on the prediction horizon has a continuous form, which is constructed from linear interpolation of finite number of vectors. This, in turn, leads to improved control performance. We derive a predictor such that it takes linear interpolation into account and proposes the method by which we can express the cost exactly. Through simulation study fur an inverted pendulum, we illustrate that the proposed algorithm has the better control performance than the existing one.