• Title/Summary/Keyword: Performance Predictor

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An Dynamic Branch Prediction Scheme to Reduce Negative Interferences for ILP Processors (ILP 프로세서를 위한 부정적 간섭을 감소시키는 동적 분기예상 기법)

  • 박홍준;조영일
    • Journal of Internet Computing and Services
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    • v.2 no.1
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    • pp.23-30
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    • 2001
  • ILP processors require an accurate branch prediction scheme to achieve higher performance. Two-Level branch predictor has been known to achieve high prediction accuracy. But, when a branch accesses a PHT entry that was, previously updated by other branch, Two-level predictor may cause interferences. Negative interferences among all interferences have a negative effect on performance, since they can cause branch mispredictions. Agree predictor achieve high prediction accuracy by converting negative interferences to positive interferences by adding bias bits to BTB, but negative interferences may occur when bias bit is set incorrectly. This paper presents a new dynamic branch predictor which reduces negative interferences. In the proposed predictor, we attach hit bits to entries in BTB to change bias bit dynamically during the execution time, h a result the proposed scheme improve the accuracy of prediction by reducing negative Interferences effectively, To illustrate the effect of the proposed scheme, we evaluate the performance of this scheme using SPEC92int benchmarks, The results show that the proposed scheme can outperform traditional branch predictors.

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Branch Prediction in Multiprogramming Environment (멀티프로그래밍 환경에서의 분기 예측)

  • Lee, Mun-Sang;Gang, Yeong-Jae;Maeng, Seung-Ryeol
    • Journal of KIISE:Computer Systems and Theory
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    • v.26 no.9
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    • pp.1158-1165
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    • 1999
  • 조건부 분기 명령어(conditional branch instruction)의 잘못된 분기 예측(branch misprediction)은 프로세서의 성능 향상에 심각한 장애 요인이 되고 있다. 특히 시분할(time-sharing) 시스템과 같이 문맥 교환(context switch)이 발생하는 멀티프로그래밍 환경(multiprogramming environment)에서는 더욱 낮은 분기 예측 정확성(branch prediction accuracy)을 보인다. 본 논문에서는 문맥 교환이 발생하는 멀티프로그래밍 환경에서 높은 분기 예측 정확성을 보이는 중첩 분기 예측표 교환(Overlapped Predictor Table Switch, OPTS) 기법을 소개한다. 분기 예측표(predictor table)를 분할하여 각각의 프로세스(process)에 할당하는 OPTS 기법은 문맥 교환의 영향을 최소화함으로써 높은 분기 예측 정확성을 유지하는 분기 예측 방법이다.Abstract There is wide agreement that one of the most important impediments to the performance of current and future pipelined superscalar processors is the presence of conditional branches in the instruction stream. Accurate branch prediction is required to overcome this performance limitation. Many branch predictors have been proposed to help to alleviate this problem, including the two-level adaptive branch predictor, and more recently, hybrid branch predictor. In a less idealized environment, such as a time-sharing system, code of interest involves context switches. Context switches, even at fairly large intervals, can seriously degrade the performance of many of the most accurate branch prediction schemes. In this study, we measure the effect of context switch on the branch prediction accuracy in various situation and show the feasibility of our new mechanism, OPTS(Overlapped Predictor Table Switch), which save and restore branch history table at every context switch.

Design of Hierarchical Controller for Satisfaction of Multiple Performance (다양한 성능 만족을 위한 계층적 제어기 설계)

  • Cho, Joon-Ho
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.56 no.2
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    • pp.396-406
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    • 2007
  • In this paper, we proposed development of improved model reduction and design of hierarchical controller using reduction model. The model reduction is considered that it is the transient response and the steady-state response through the use of nyquist curve. The hierarchical controller selected tuning of PID controller to ensure specified gain and phase margin and hybrid smith-predictor fuzzy controller using reduction model. Simulation examples are given to show the better performance of the proposed method than conventional methods.

Empirical Validation of Software Process Maturity on Organizational Performance (SW프로세스 성숙 수준이 기업성과에 미치는 영향에 관한 실증연구)

  • 김정욱;나미자;남기찬;박수용
    • Journal of the Korean Operations Research and Management Science Society
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    • v.27 no.3
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    • pp.1-19
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    • 2002
  • Recently, increasing attention has been paid to building a successful software process in Information System(IS) implementation. This study establishes software process model as a key predictor of organizational performance. We propose a theoretical framework for capability maturity model derived from the Software Engineering Institute(SEI). This paper identify the process-related variables, financial performance and non-financial performance from the relevant literature and clarify the concept of software process by distinguishing between its component and determinants. We then examine the impact of software process on organizational performance. Hypotheses on software process were tested for 36 enterprises including 118 organizational units. Results indicate that software process capability may serve as a key predictor of organizational performance. Software process maturity found to be positively influenced on the financial and non-financial performance, while investment of information technology as a mediating variable not significantly affected to the performance.

Design of a Low Memory Bandwidth Inter Predictor Using Implicit Weighted Prediction Technique (묵시적 가중 예측기법을 이용한 저 메모리 대역폭 인터 예측기 설계)

  • Kim, Jinyoung;Ryoo, Kwangki
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.12
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    • pp.2725-2730
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    • 2012
  • In this paper, for improving the H.264/AVC hardware performance, we propose an inter predictor hardware design using a multi reference frame selector and an implicit weighted predictor. previous reference frame are reused for Low Memory Bandwidth. The size of the reference memory in the predictor was reduced by about 46% and the external memory access rate was reduced by about 24% compared with the one in the reference software JM16.0. We designed the proposed system with Verilog-HDL and synthesized inter predictor circuit using the Magnachip 0.18um CMOS standard cell library. The synthesis result shows that the gate count is about 2,061k and the design can run at 91MHz.

A Study on Engine A/F Control by Sillth-predictor (Smith- predictor기법을 이용한 엔진 공기-연료비 제어에 관한 연구)

  • Park, Hee-Chul;Kim, You-Nam;Lee, Deog-Kyoo;Jo, Jang-Won;Woo, Kwang-Bnag
    • Proceedings of the KIEE Conference
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    • 1989.07a
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    • pp.84-88
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    • 1989
  • Recently electronic control of engine is used to satisfy exhaust gas restriction and to increase fuel economical efficiency and acceleration. In this paper, Smith-predictor method is applied to increase control performance for A/F command and disturbance. A/F control performance is simulated by A/F command and disturbance of Chevolet 5.7 liter engine and Toyota 4A-ELU engine. This method can be applied to A/F controller so that lion accurate and rapid A/F control is possible.

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The Single Step Prediction of Multi-Input Multi-Output System using Chaotic Neural Networks (카오틱 신경망을 이용한 다입력 다출력 시스템의 단일 예측)

  • 장창화;김상희
    • Proceedings of the IEEK Conference
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    • 1999.06a
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    • pp.1041-1044
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    • 1999
  • In This paper, we investigated the single step prediction for output responses of chaotic system with multi Input multi output using chaotic neural networks. Since the systems with chaotic characteristics are coupled between internal parameters, the chaotic neural networks is very suitable for output response prediction of chaotic system. To evaluate the performance of the proposed neural network predictor, we adopt for Lorenz attractor with chaotic responses and compare the results with recurrent neural networks. The results demonstrated superior performance on convergence and computation time than the predictor using recurrent neural networks. And we could also see good predictive capability of chaotic neural network predictor.

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Performance Analysis of Pattern/Path Hybrid Branch Prediction Strategy (패턴/패스 통합 분기 예측 전략의 성능 분석)

  • 조경산
    • Journal of the Korea Society for Simulation
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    • v.8 no.3
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    • pp.17-28
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    • 1999
  • Recently studies have shown that conditional branches can be accurately predicted by recording the path leading up to the branch. But path predictors are more complex and uncompatible with existing pattern branch predictors. In order to solve these problems, we propose a simple path branch predictor(SPBP) that hashes together two most recent branch instruction addresses. In addition, we propose a pattern/path hybrid branch predictor composed of the SPBP and existing pattern branch predictors. Through the trace-driven simulation of six benchmark programs, the performance improvement by the proposed pattern/path hybrid branch prediction is analysed and validated. The proposed predictor can improve the prediction accuracy from 94.21% to 95.03%.

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Branch Predictor Design and Its Performance Evaluation for A High Performance Embedded Microprocessor (고성능 내장형 마이크로프로세서를 위한 분기예측기의 설계 및 성능평가)

  • Lee, Sang-Hyuk;Kim, Il-Kwan;Choi, Lynn
    • Proceedings of the IEEK Conference
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    • 2002.06b
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    • pp.129-132
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    • 2002
  • AE64000 is the 64-bit high-performance microprocessor that ADC Co. Ltd. is developing for an embedded environment. It has a 5-stage pipeline and uses Havard architecture with a separated instruction and data caches. It also provides SIMD-like DSP and FP operation by enabling the 8/16/32/64-bit MAC operation on 64-bit registers. AE64000 processor implements the EISC ISA and uses the instruction folding mechanism (Instruction Folding Unit) that effectively deals with LERI instruction in EISC ISA. But this unit makes branch prediction behavior difficult. In this paper, we designs a branch predictor optimized for AE64000 Pipeline and develops a AES4000 simulator that has cycle-level precision to validate the performance of the designed branch predictor. We makes TAC(Target address cache) and BPT(branch prediction table) seperated for effective branch prediction and uses the BPT(removed indexed) that has no address tags.

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The Characteristic of Reward in Computer Assisted Learning

  • Yeon, Eun-Mo;Lee, Sun-Young;Chung, Yoon-Kyung;Cho, Eun-Soo;Kwon, Soon-Goo;Jeon, Hun;Lee, Kye-Hyeng;Yoon, Sung-Hyun;So, Yeon-Hee;Kim, Sung-Il
    • 한국HCI학회:학술대회논문집
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    • 2008.02b
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    • pp.64-70
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    • 2008
  • Computer Assisted Learning (CAL) is quite different from in many aspects. CAL provides individualistic learning environment and facilitates autonomy of the learner. Thus the learners who uses CAL program has more sense of control and engages in more strategic learning than conventional learning environment. In this experiment, we used KORI (KORea university intelligent agent) which is a new type of ITS adopting TA (Teachable Agent) that fosters learning by teaching, So, we investigated the critical motivational factor that have influences in CAL learning and the effects of reward in CAL are another area of our interest. Thus, we divided two conditions that presence of reward and absence of reward. The 174 elementary school students(5th) were participated and they are randomly assigned the one of the reward conditions. Before entering the experimental instruction, all participants measured about metacognition, self-efficacy and goal orientation questionnaire as independent variables. Then, Participants were instructed of method of using KORI program and asked to study for ten days with KORI program at least 20 minutes everyday in their home, about 10 days. After 10 days, they were rated interest and comprehension. Regression results suggest that regardless of the presence of reward, metacognition is a positive predictor in interestingness. It indicate that metacognitive skills are required in CAL learning situation irrespective of reward. But on comprehension in the absence of reward, only self- efficacy appeared to be a positive predictor. In the presence of reward, performance goal orientation showed as a negative predictor of comprehension, whereas self-efficacy was a positive predictor. This result suggest that presence of reward especially interferes learning process of performance goal orientation in CAL learning situation. It could be interpreted that reward interferes the learning process of performance goal orientation by debilitating intrinsic motivation.

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