• 대한안전경영과학회지
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• 제14권2호
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• pp.221-228
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• 2012

This paper analyzed twenty-six production-related KPI(Key Performance indicator) factors of business diagnosis, such as personnel, equipment, materials, operations and quality affecting company business competition to 186 small machinery manufacturers in 2010. Also, we explained the concept of Business Positioning and divided research subjects into four Business Positioning Groups formed break-even point ratio & fixed cost ratio to sales and then we compared between the 4 groups using Logistic Regression analysis by SAS statistical software package. The objective of this study is two-fold. The first is to find out production-related KPI factor of superior Business Positioning Group. The second is to suggest improvement ways for small manufacturers in order to get better profitable Business Positioning.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2008년도 하계종합학술대회
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• pp.491-492
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• 2008

According to high-speed large scale integration trend of Memory module product, many type of noises, such a reflection, cross-talk simultaneous switching noise, occur on the Package PCB and they make the deterioration of memory module's performance and reliability. As module products have more high efficiency, Hardware of test board and socket has to be considered In test of the high-speed Memory Module. we mainly focused on improvement of Signal integrity Using the High Frequency Test socket that we invented

• 정보과학회 논문지
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• 제44권9호
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• pp.878-886
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• 2017

본 논문에서는 고성능컴퓨팅 분야에서 주로 활용되는 MPI 응용들을 인텔의 차세대 매니코어 프로세서인 Knights Landing(KNL)에서 실행할 때 발생할 수 있는 성능 병목 현상 및 이를 해결하기 위한 효율적인 자원 할당 방법에 대해서 논의하고자 한다. KNL은 기존의 가속기 형태의 매니코어 프로세서 형태뿐만 아니라 자체적으로 부팅이 가능한 형태의 호스트 프로세서로 구성되어 있으며, 기존의 DDR4 기반의 메모리와 함께 향상된 대역폭을 가진 새로운 형태의 온-패키지 메모리를 장착해서 출시되었다. 이러한 새로운 매니코어 프로세서 아키텍처에 최적화된 자원 할당 방법을 연구함으로써 다중 MPI 응용 실행 성능의 향상과 전체적인 시스템 활용률을 높일 수 있음을 실험적으로 검증하였다.

• 대한전자공학회논문지SD
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• 제37권1호
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• pp.8-18
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• 2000

본 논문은 RF 호로 모듈을 구현하기 위한 방법으로서 BGA(Ball Grid Array) 패키지 구조를 제시하고 그 전기적 변수를 추출하였다. RF 소자의 동작 주파수가 높아지면서 RF 회로를 구성하는 패키지의 전지적 기생 성분들은 무시할 수 없을 정도로 동작회로에 영향을 끼친다. 또한 소형화 이동성을 요구하는 무선 통신 시스템은 그 전기적 특성을 만족시킬 수 있도록 새로운 RF 회로 모듈 구조를 요구한다. RF 회로 모듈 BGA 패키지 구조는 회로 동작의 고속화, 소형화, 짧은 회로 배선 길이, 아날로그와 디지탈 혼성 회로에서 흔히 발생하는 전기적 기생 성분에 의한 잡음 개선등 기존의 구조에 비해 많은 장점을 제공한다. 부품 실장 공정 과정에서도 BGA 패키지 구조는 드릴링을 이용한 구멍 관통 홀 제작이 아닌 순수한 표면 실장 공정만으로 제작될 수 있는 장점을 제시한다. 본 실험은 224MHz에서 동작하는 ITS(Intelligent Transportation System) RF 모튤을 BGA 패키지 구조로 설계 제작하였으며, HP5475A TDR(Time Domain Reflectometry) 장비를 이용하여 3${\times}$3 입${\cdot}$출력단자 구조을 갖는 RF 모튤 BGA 패키지의 전기적 파라메타의 기생성분을 측정하였다. 그 결과 BGA 공납의 자체 캐패시턴스는 68.6fF, 자체 인덕턴스는 1.53nH로써 QFP 패키지 구조의 자체 캐패시턴스 200fF와 자체 인덕턴스 3.24nH와 비교할 때 각각 34%, 47%의 값에 지나지 않음을 볼 수 있었다. HP4396B Network Analyzer의 S11 파라메타 측정에서도 1.55GHz 근방에서 0.26dB의 손실을 보여주어 계산치와 일치함을 보여 주었다. BGA 패키지를 위한 배선 길이도 0.78mm로 짧아져서 RF 회로 모튤을 소형화시킬 수 있었으며, 이는 RF 회로 모듈 구성에서 BGA 패키지 구조를 사용하면 전기적 특성을 개선시킬 수 있음을 보여준 것이다.

• 지역사회간호학회지
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• 제8권2호
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• pp.197-210
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• 1997

This study was conducted to test the effect of cognitive stimulation training on elderly persons with dementia. The design of the research was one group in pre-test-post-test design. The subjects were nine demented persons over sixty years, with mild to moderate cognitive impairment. Training was administered by research assistants on a one to one basis for thirty to forty minutes, three times a week for eight weeks. In order to evaluate the effect of cognitive stimulation training, we measured cognitive function before and after three training sessions each. Data were analyzed using descriptive statistics and a paired t-test analysis using a spss pc package, The results are as follows: 1) The recipients of the training program showed improvement in overall cognitive functioning. The MMSK - K score, recall levels of concepts, daily tasks, personal past history and performance of word fluency were significantly increased after training. 2) There was a significant improvement in cognitive functioning over the training period: recall levels of concepts, daily tasks, past personal history and performance of word fluency significantly increased over the training period progessively, The results suggest that cognitive stimulation training is effective in improving and maintaining overall cognitive function of elderly persons with dementia.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2001년도 춘계학술대회논문집D
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• pp.771-776
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• 2001

By matching a well established fast throughflow code, with standard loss correlations, and an efficient optimization algorithm, a new design system has been developed, which optimizes inlet and exit flow-field parameters for each blade row of a multistage axial flow turbine. The compressible steady state inviscid throughflow code based on streamline curvature method is suitable for fast and accurate flow calculation and performance prediction of a multistage axial flow turbine. A general purpose hybrid constrained optimization package, iSIGHT has been used, which includes the following modules: genetic algorithm, simulated annealing, modified method of feasible directions. The design system has been demonstrated using an example of a 5-stage low pressure steam turbine for 800MW thermal power plant previously designed by HANJUNG. The comparison of computed performance of initial and optimized design shows significant improvement in the turbine efficiency.

• Journal of information and communication convergence engineering
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• 제12권1호
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• pp.46-52
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• 2014

This article presents key research needs in three-dimensional integrated circuit (3D IC) architectural floorplanning. Architectural floorplaning is done at a very early stage of 3D IC design process, where the goal is to quickly evaluate architectural designs described in register-transfer level (RTL) in terms of power, performance, and reliability. This evaluation is then fed back to architects for further improvement and/or modifications needed to meet the target constraints. We discuss the details of the following research needs in this article: block-level modeling, through-silicon-via (TSV) insertion and management, and chip/package co-evaluation. The goal of block-level modeling is to obtain physical, power, performance, and reliability information of architectural blocks. We then assemble the blocks into multiple tiers while connecting them using TSVs that are placed in between hard IPs and inside soft IPs. Once a full-stack 3D floorplanning is obtained, we evaluate it so that the feedback is provided back to architects.

• 한국식품조리과학회지
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• 제27권1호
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• pp.21-31
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• 2011

The purposes of this study were to investigate the gap in perceived importance-performance between dietitians and food service workers regarding school food service sanitation and to analyze items that should be given priority for improvement. Data were collected by 440 food service workers and 71 dietitians in Gyeongbuk province. All statistical analyses were conducted using the SAS package program (version 8.2 for Windows) for descriptive analysis, t-test, and importance-performance analysis (IPA). According to the performance analysis, there were significant differences between dietitians and food service workers in 18 out of the 20 items. In all of 18 items, the evaluated performance scores according to the food service workers were higher than those of the dietitians. In addition, the results of IPA confirmed the following areas as improvement priorities: proper hand washing of food service workers, cleanliness of trays and utensils, monitoring of temperature of refrigerated/frozen foods and quality of the food materials during inspection, proper washing and disinfection of raw vegetables and fruits and maintenance of CCP records, and control of food holding temperature and methods. In conclusion, dietitians should perform education about sanitation management items that have low perceived importance and should make a plan to improve sanitation management after understanding the gap in perceived importance-performance between dietitians and food service workers.

• 한국식품조리과학회지
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• 제24권3호
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• pp.325-332
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• 2008

The purpose of this study was to analyze the gap in perceived sanitaion management importance-performance for school foodservice facilities and utilities. Questionnaires were delivered to 200 dietitians who are employed in school foodservice. A total of 108 were usable, resulting in an 54.0% response rate. Statistical analyses were performed using the SAS package program(version 8.2 for Windows) for descriptive analysis, t-tests, and importance-performance analysis (IPA). Among the respondents, 58.3% of the dietitians had more than 10 years of work experience, 81.5% were university graduates, and 64.8% worked in elementary schools. Also, 89.8% of the school foodservices provided meals once a day. According to the importance and performance analysis for 25 items, significant differences were found between importance and performance and the importance score was significantly higher than the performance score for all of the items. The results of IPA showed the following areas as improvement priorities: physical separation between the clean areas and the unclean areas to prevent cross-contamination, and proper management of the temperature and humidity within kitchens and food storage facilities. Overall, the IPA results indicated that the items in need of urgent need of improvement will require political support, and above all, continued research. Finally, better models of foodservice facilities and utilities are needed to improve and modernize the operating conditions of these various foodservice establishments.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2003년도 기술심포지움 논문집
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• pp.53-58
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• 2003

The Wafer Level Packaging is one of the most important technologies in the semiconductor industry today. Its primary advantages are its small form factor and low cost potential for manufacturing including test procedure. The CASIO's WLP samples, application example and the structure are shown in Fig.1, 2&3. There are dielectric layer , under bump metal, re-distribution layer, copper post , encapsulation material and terminal solder .The key technologies are 'Electroplating thick copper process' and 'Unique wafer encapsulation process'. These are very effective in getting electrical and mechanical advantages of package. (Fig. 4). CASIO and CMK are developing a new System Packaging technology called the Embedded Wafer Level Package (EWLP) together. The active components (semiconductor chip) in the WLP structure are embedded into the Printed Wiring Board during their manufacturing process. This new technical approach has many advantages that can respond to requirements for future mobile products. The unique feature of this EWLP technology is that it doesn't contain any solder interconnection inside. In addition to improved electrical performance, EWLP can enable the improvement of module reliability. (Fig.5) The CASIO's WLP Technology will become the effective solution of 'KGD problem in System Packaging'. (Fig. 6) The EWLP sample shown in Fig.7 including three chips in the WLP form has almost same structure wi_th SoC's. Also, this module technology are suitable for RF and Analog system applications. (Fig. 8)