• Title/Summary/Keyword: Pattern Generation

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Use of learning method to generate of motion pattern for robot (학습기법을 이용한 로봇의 모션패턴 생성 연구)

  • Kim, Dong-won
    • Journal of Platform Technology
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    • v.6 no.3
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    • pp.23-30
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    • 2018
  • A motion pattern generation is a process of calculating a certain stable motion trajectory for stably operating a certain motion. A motion control is to make a posture of a robot stable by eliminating occurring disturbances while a robot is in operation using a pre-generated motion pattern. In this paper, a general method of motion pattern generation for a biped walking robot using universal approximator, learning neural networks, is proposed. Existing techniques are numerical methods using recursive computation and approximating methods which generate an approximation of a motion pattern by simplifying a robot's upper body structure. In near future other approaches for the motion pattern generations will be applied and compared as to be done.

A Study on The Cutting Pattern Generation of Membrane Structures and The Loss-Ratio of Material (막 구조물의 재단도 작성과 막재의 손실률에 관한 연구)

  • Shon, Su-Deok;Jeong, Eul-Seok;Kim, Seung-Deog
    • Journal of Korean Association for Spatial Structures
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    • v.6 no.1 s.19
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    • pp.117-127
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    • 2006
  • Membrane structures, a kind of lightweight soft structural system, are used for spatial structures. The design procedure of membrane structures are needed to do shape finding, stress-deformation analysis and cutting pattern generation, because the material property has strong axial stiffness, but little bending stiffness. The problem of cooing pattern is highly varied in their size, curvature and material stiffness. So, the approximation inherent in cutting pattern generation methods is quite different. Therefore the ordinary computer software of structural analysis & design is not suitable for membrane structures. In this study, we develop the program for cooing pattern generation using geodesic line, and investigate the result of example's cooing pattern in detail.

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Design of Pattern Generation Circuit for Display Test (디스플레이 테스트를 위한 패턴 생성 회로 설계)

  • 조경연
    • Proceedings of the IEEK Conference
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    • 2003.07b
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    • pp.1149-1152
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    • 2003
  • Now a days, many different kinds of display technologies such as Liquid Crystal Display (LCD), Organic Light Emitting Diode (OLED), and Liquid Crystal On Silicon (LCOS) are designed. And these display technologies will be used in many application products like High Definition Televisions (HDTVs) or mobile devices. In this paper, pattern generation circuit for display test is proposed. The proposed circuit will be embedded in the control circuit of display chip. Two differenct kinds of patterns is generated by the circuit. One is block pattern for color test, and the other is line pattern for pixel test. The shape of test pattern is determined by the values of registers in pattern generation circuit. The circuit is designed using Verilog HDL RTL code.

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Optimization-Based Pattern Generation for LAD (최적화에 기반을 둔 LAD의 패턴 생성 기법)

  • Jang, In-Yong;Ryoo, Hong-Seo
    • Journal of the Korea Society of Computer and Information
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    • v.11 no.1 s.39
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    • pp.11-18
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    • 2006
  • The logical analysis of data(LAD) is a Boolean-logic based data mining tool. A critical step in analyzing data by LAD is the pattern generation stage where useful knowledge and hidden structural information in data is discovered in the form of patterns. A conventional method for pattern generation in LAD is based on term enumeration that renders the generation of higher degree patterns practically impossible. In this paper, we present a novel optimization-based pattern generation methodology and propose two mathematical programming models, a mixed 0-1 integer and linear programming (MILP) formulation and a well-studied set covering problem (SCP) formulation for the generation of optimal and heuristic patterns, respectively. With benchmark datasets, we demonstrate the effectiveness of our models by automatically generating with ease patterns of high complexity that cannot be generated with the conventional approach.

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Test pattern Generation for the Functional Test of Logic Networks (논리회로 기능검사를 위한 입력신호 산출)

  • 조연완;홍원모
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.13 no.3
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    • pp.1-6
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    • 1976
  • In this paper, a method of test pattern generation for the functional failure in both combinational and sequentlal logic networks by using exterded Boole an difference is proposed. The proposed technique provides a systematic approach for the test pattern generation procedure by computing Boolean difference of the Boolean function that represents the Logic network for which the test patterns are to be generated. The computer experimental results show that the proposed method is suitable for both combinational and asynchronous sequential logic networks. Suitable models of clocked flip flops may make it possible for one to extend this method to synchronous sequential logic networks.

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3-D Finite Element Mesh Generation of Tires Considering Detailed Tread Pattern (상세 트레드 패턴을 반영한 3차원 타이어 유한요소 격자 생성)

  • Cho, Jin-Rae;Kim, Ki-Whan;Hong, Sang-Il;Kim, Nam-Jeon;Kim, Kee-Woon
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.27 no.10
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    • pp.1615-1622
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    • 2003
  • Being contacted directly with. ground, the tire tread part is in shape of complex patterns of variable ASDs(anti-skid depth) to satisfy various tire performances. However, owing to the painstaking mesh generation job and the extremely long CPU-time, conventional 3-D tire analyses have been performed by either neglecting tread pattern or modeling circumferential grooves only. As a result, such simplified analysis models lead to considerably poor numerical expectations. This paper addresses the development of a 3-D tire mesh generation considering the detailed tread pattern and shows that the contact pressure and frictional energy distribution of tires considering the detailed pattern become better than those by the simplified tire model.

Walking Pattern Generation employing DAE Integration Method

  • Kang Yun-Seok;Park Jung-Hun;Yim Hong Jae
    • Journal of Mechanical Science and Technology
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    • v.19 no.spc1
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    • pp.364-370
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    • 2005
  • A stable walking pattern generation method for a biped robot is presented in this paper. In general, the ZMP (zero moment point) equations, which are expressed as differential equations, are solved to obtain a stable walking pattern. However, the number of differential equations is less than that of unknown coordinates in the ZMP equations. It is impossible to integrate the ZMP equations directly since one or more constraint equations are involved in the ZMP equations. To overcome this difficulty, DAE (differential and algebraic equation) solution method is employed. The proposed method has enough flexibility for various kinematic structures. Walking simulation for a virtual biped robot is performed to demonstrate the effectiveness and validity of the proposed method. The method can be applied to the biped robot for stable walking pattern generation.

Pattern Shape Modulation by Scanning Methods in E-Beam Lithography (전자빔 리소그래피를 이용한 주사기법에 따른 패턴형상 조정)

  • Oh, Se-Kyu;Kim, Seoung-Jae;Kim, Dong-Hwan;Park, Keun;Jang, Dong-Young
    • Journal of the Korean Society of Manufacturing Technology Engineers
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    • v.18 no.6
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    • pp.558-564
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    • 2009
  • To aim at obtaining a correct and fine small pattern by an electron beam lithography several conditions and methods affecting a real pattern shape needs to be investigated. A micro/nano sized pattern shape is sometimes dependent on the scanning method. In this work, four types of scanning methods are implemented and their characteristics are investigated. For a $11\times11um$ pattern, a Zigzag scanning method proves a precise pattern generation. The other ways such as SEM scanning and swirl in-out scanning method result in some distorted pattern shape. It is proved that abrupt change in the pattern generation limits to obtaining a fine and small pattern.

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A Fast Automatic Test Pattern Generator Using Massive Parallelism (대량의 병렬성을 이용한 고속 자동 테스트 패턴 생성기)

  • 김영오;임인칠
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.32B no.5
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    • pp.661-670
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    • 1995
  • This paper presents a fast massively parallel automatic test pattern generator for digital combinational logic circuits using neural networks. Automatic test pattern generation neural network(ATPGNN) evolves its state to a stable local minima by exchanging messages among neural network modules. In preprocessing phase, we calculate the essential assignments for the stuck-at faults in fault list by adopting dominator concept. It makes more neurons be fixed and the system speed up. Consequently. fast test pattern generation is achieved. Test patterns for stuck-open faults are generated through getting initialization patterns for the obtained stuck-at faults in the corresponding ATPGNN.

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Velocity Pattern Generation for the Position Control Elevator (엘리베이터 위치제어를 위한 속도패턴 발생)

  • 김경서;박창훈;강기호;한권상
    • The Transactions of the Korean Institute of Power Electronics
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    • v.4 no.6
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    • pp.616-623
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    • 1999
  • Elevator velocity pattern is basL'C! on combining the time-based velocity pattern according to which the car m trip from starting position to vicinity of target position, and distance-based velocity pattern for precise landing ( of car. To obtain the lide comfortability, the impact caused by velocity pattern switching should be minimizLD b by removing the discontinuity of velocity and acceleration. In this paper, new velocity pattern generation m method which ensure the continuity of velocity and acceleration during pattern switching is proposed. P ProPOSLD velocity pattern also shorten the landing time to the target position.

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