• Journal of Power Electronics
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• 제9권6호
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• pp.854-865
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• 2009

Super-lift dc-dc converters are a series of advanced step-up dc-dc topologies that provide high voltage transfer gains by super-lift techniques. This paper presents a developed graphical modelling method for super-lift converters and gives a thorough analysis with a consideration of the effects caused by parasitic parameters and diodes' forward voltage drop. The general guidelines for constructing and deriving graphical models are provided for system analysis. By applying it to examples, the proposed method shows the advantages of high convenience and feasibility. Both the circuit simulation and experimental results are given to support the theoretical analysis.

• 전기학회논문지
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• 제67권4호
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• pp.538-542
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• 2018

In order to generate a clock source with low cost and high performance in system on chip(SoC), a relaxation oscillator with stable output characteristics according to PVT(process, voltage and temperature) fluctuation require a low area and a low power. In this paper, we propose a solution to reduce the current loss caused by parasitic components in the conventional relaxation oscillator. Since the slew rate of the bias current and the capacitor are adjusted to be the same through the proposed solution, a relaxation oscillator with low area characteristics is designed for the same clock source frequency implementation. The proposed circuit is designed using the TSMC CMOS 0.18um process. The Simulation results show that the relaxation oscillator using the proposed solution can prevent the current loss of about $279{\mu}A$ and reduce the total chip area by 20.8% compared with the conventional oscillator in the clock source frequency of 96 MHz.

• Journal of international Conference on Electrical Machines and Systems
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• 제2권1호
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• pp.57-64
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• 2013

The functional characteristic of LISN circuit, which is used for measurements of conductive noise in mains power line, is basically related to frequency characteristics of passive elements like inductors used in the circuit as well as the frequency response of inductors is highly related to the resins used in the varnishing process. The significant problem in determination of an inductor's frequency characteristic is the intrinsic resistance, inductance and parasitic capacitance. In this triplet, the parasitic capacitance is the major limiting factor of inductor's frequency range. This capacitance depends on inductor design parameters and materials filling the spaces of coil like resin and its coherency after curing process. In this paper, two similar inductors were designed and built. The first inductor was not varnished while the second one was varnished with VPI technology. VPI, or Vacuum, Pressure, Impregnation technology is one of the most reliable methods performing good insulating conditions for electrical circuits and windings based on resins. The measured results show that implying varnishing technology does not significantly affect the frequency response. However, due to mechanical solidity aspects and improved environmental protection, it is better to varnish the inductors.

• 전자공학회논문지
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• 제50권12호
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• pp.56-62
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• 2013

우리는 MOSFET Layout 단계에서 Multiplier 구성을 통한 Common centroid layout 방식을 사용한 무선 전력 전송 용 CMOS 정류회로를 제안한다. 제안하는 정류회로는 기존의 다이오드를 사용하지 않은 Cross-coupled MOSFET 정류회로로 13.56 MHz에서 동작한다. 전력 소모를 최소화하고, 높은 주파수까지 동작하기 위하여 Full bridge 정류회로에서 효율을 높이기 위한 비교기를 제거하였다. Layout 단계에서 Multiplier 구성을 통한 Common centroid layout 방식은 Chip-layout 상에서 MOSFER의 Finger에 의해 길어진 연결 선로에 존재하는 기생 직렬 저항과 병렬 Capacitor에 의해 발생하는 시간 지연을 줄이기 위해 고안되어, 천이 시간을 줄여 Cross-coupled 구조의 On-상태에서 Off-상태, 혹은 그 반대의 상태 변화를 빠르게 한다. 이는 빠른 상태 변화 시간으로 인해 전력 변환 효율을 증가시킨다. 본 정류회로는 $0.11{\mu}m$ CMOS 공정으로 제작되었으며, 전력 변환 효율은 최대 86.4%로 측정되었으며, 600 MHz 이상까지 높은 전력 변환 효율을 가지며, 이는 현재 발표된 것 중, Cross-coupled 구성을 기반으로 한 정류회로 중 가장 높은 성능을 가진다.

• 한국전자파학회논문지
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• 제25권7호
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• pp.737-746
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• 2014

대용량, 초고속 통신으로 인해 MIMO 시스템에 대한 연구가 활발하게 진행 중이다. 하지만 MIMO 시스템은 다수의 배열 안테나를 사용하기 때문에 다수의 RF 체인이 존재한다. 이로 인해 복잡도와 전력 소모가 증가하고, 안테나의 소형화가 불가능하다는 단점을 가진다. 이런 단점을 극복하기 위해 ESPAR 안테나를 사용하는 Beamspace MIMO 기술이 제안되었다. ESPAR 안테나를 사용하는 빔 공간 MIMO 시스템은 단일 능동 소자와 다수의 기생 소자로 구성되어 있기 때문에, 단일 RF 체인으로 구성되어 있기 때문에 복잡도와 전력 소모를 감소시킬 수 있다. 본 논문에서는 ESPAR 안테나를 사용하는 QPSK 변조 방식의 빔 공간 MIMO 시스템에 보안성 향상을 위해 최초로 카오스 통신 알고리즘을 적용시킨다. 이 시스템을 카오스 빔 공간 MIMO 시스템이라고 정의하고, 통신 성능을 평가한다. 또한, ESPAR 안테나는 기생 소자의 리액턴스를 조절하여 리액턴스 셋을 생성함으로써 QPSK 심볼을 만들고, 이를 이용한 통신 성능을 평가한다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2015년도 전력전자학술대회 논문집
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• pp.49-50
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• 2015

Piezoelectric elements are one of good candidates able to replace motors in various electronics devices. It is slim and compact and low power consumption compare to motors. Linear regulator or class-D amplifier are generally used for piezoelectric element driver, however, suffers from severe power consumption. In this paper, electrical modeling of piezoelectric element will be presented and switching losses on the driver due to the parasitic capacitance will be analyzed. And new ZVS full bridge converter with an inductor will be proposed so as to reduce the power losses.

• 조명전기설비학회논문지
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• 제28권3호
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• pp.32-43
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• 2014

This paper presents the intra capacitance modeling according to the winding method, section bobbin and coil structure for hybrid choke coil capable of the EMI attenuation of broad bands from lower frequency bands to higher frequency bands and high frequency type common-mode choke coil capable of the EMI attenuation of high frequency band used in the EMI Block of LED-TV SMPS. In case of high frequency type CM choke coil, it can be explained the parasitic capacitance of A type and section bobbin type winding methods among them is much smaller than the other. The first resonant frequency of the proposed CM choke coil tends to increase as the parasitic capacitance becomes small and its impedance characteristics also show improved performance as the first resonant frequency increases. In case of hybrid choke coil using rectangular copper wire, it has investigated its parasitic capacitance compared to CM choke coil of conventional toroidal type becomes small. Also it has confirmed through the experiment results that CE margin and RE margin in frequency bands 0.5MHz to 5MHz and 30MHz to 200MHz are respectively 10dB and 15dB greater than that of conventional type in case of one stage EMI filter structure adopting hybrid choke coil compared to two stage EMI Filter structure using two of each CM choke coil used in the lower and higher frequency bands or two of CM choke coil used in only the lower frequency bands. In the future, the hybrid choke coil and CM choke coil of high frequency type show it can be practically used in not only LED/LCD-TV SMPS but also several applications such as LED Lighting, Laptop Adapter, Server Power Supply and so on.

• 조명전기설비학회논문지
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• 제12권3호
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• pp.114-123
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• 1998

The multi-resonant converter(MRC) minimizes a parasitic oscillation by using the resonant tank circuit absorbed parasitic reactances existing in a converter circuit. So it si possible that the converter operated at a high frequency has a high efficiency because the losses are reduced. Such a MHz high frequency applications provide a high power density [W/inch3] of the converter. But the resonant voltage stress across a switch of the resonant tank circuit is 4~5 times a input voltage. This h호 voltage stress increases the conduction loss because of on-resistance of a MOSFET with higher rating. Thus, in this paper we proposed the alternated multi-resonant converter (AT MRC) differ from the clamp mode multi-resonant converter and applicated it to the forward MRC. The AT forward MRC can reduce the voltage stress to 2~3 times a input voltage by using two series input capacitor. The control circuit is simple because tow resonant switches are driven directly by the output pulse of the voltage controled oscillator. This circuit type is verified through the experimental converter with 48V input voltage, 5V/50W output voltage/power and PSpice simulation. the measured maximum voltage stress is 170V of 2.9 times the input voltage and the maximum efficiency of 81.66% is measured.

• Journal of Power Electronics
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• 제6권1호
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• pp.73-82
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• 2006

Plasma display panels (PDPs) have a serious thermal problem, because the luminance efficiency of a conventional PDP is about 1.5 1m/W and it is less than $3\~5\;lm/W$ of a cathode ray tube (CRT). Thus there is a need for improving the luminance efficiency of the PDP. There are several approaches to improve the luminance efficiency of the PDP and we adopted a driving PDP at high frequency range from 400kHz up to over 700kHz. Since a PDP is regarded as an equivalent inherent capacitance, many types of sustaining drivers have been proposed and widely used to recover the energy stored in the PDP. However, these circuits have some drawbacks for driving PDPs at high frequency ranges. In this paper, we investigate the effect of the parasitic components on the PDP itself and on the driver when the reactive energy of the panel is recovered. Various drivers are classified and evaluated based on their suitability for high frequency drivers. Finally, a current-fed driver with a DC input voltage bias is proposed. This driver overcomes the effect of parasitic components in the panel and driver. It fully achieves a ZVS of all full-bridge switches and reduces the transition time of the panel polarity. It is tested to validate the high frequency sustaining driver and the experimental results are presented.

• 대한기계학회논문집B
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• 제32권5호
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• pp.359-366
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• 2008

A two-dimensional thermal model of proton exchange membrane fuel cell with large active area is developed to investigate the performance of fuel cell with large active area over various thermal management conditions. The core sub-models of the two-dimensional thermal model are one-dimensional agglomerate structure electrochemical reaction model, one-dimensional water transport model, and a two-dimensional heat transfer model. Prior to carrying out the simulation, this study is contributed to set up the operating temperature of the fuel cell with large active area which is a maximum temperature inside the fuel cell considering durability of membrane electrolyte. The simulation results show that the operating temperature of the fuel cell and temperature distribution inside the fuel cell can affect significantly the total net power at extreme conditions. Results also show that the parasitic losses of balance of plant component should be precisely controlled to produce the maximum system power with minimum parasitic loss of thermal management system.