• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.47-48
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• 2006

In this paper, intrinsic n channel MOSFETs with external parasitic components are modeled. Using sensitivity analysis, effective parasitic components are tested and the optimized model is extracted. The extracted model is fitted to the measured S-parameters with different channel width. Based on this methodology, this method, external parasitic components that affect MOSFET operations can be analyzed and modeled.

• The Transactions of the Korean Institute of Power Electronics
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• v.21 no.1
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• pp.88-93
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• 2016

LCL filters are widely used in high-order harmonics attenuation of output currents in grid-connected inverters. However, output currents of grid-connected inverters with LCL filters can become unstable because of the resonance of the filters. Given that the characteristics of output currents in inverters mostly depend on filter performance, the exact analysis of filters by considering parasitic components is necessary for both harmonics attenuation and current control. LCL filters have three or four parasitic components: the series and/or parallel resistance of the filter capacitor and the series resistance of the two filter inductors. Most studies on LCL filters have focused on the parasitic components of the filter capacitor. Although several studies have addressed the parasitic components of the filter inductor at the inverter side, no study has yet investigated the concurrent effects of series resistance in both filter inductors in detail. This paper analyzes LCL filters by considering series resistance in both filter inductors; it proposes an active damping method based on the virtual series resistance of LCL filters. The performance of the proposed active damping is then verified through both simulation and experiment using Hardware-in-the-Loop Simulator(HILS).

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.5
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• pp.525-536
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• 2014

Recently, the first generation of mass production of FinFET-based microprocessors has begun, and scaling of FinFET transistors is ongoing. Traditional capacitance and resistance models cannot be applied to nonplanar-gate transistors like FinFETs. Although scaling of nanoscale FinFETs may alleviate electrostatic limitations, parasitic capacitances and resistances increase owing to the increasing proximity of the source/drain (S/D) region and metal contact. In this paper, we develop analytical models of parasitic components of FinFETs that employ the raised source/drain structure and metal contact. The accuracy of the proposed model is verified with the results of a 3-D field solver, Raphael. We also investigate the effects of layout changes on the parasitic components and the current-gain cutoff frequency ($f_T$). The optimal FinFET layout design for RF performance is predicted using the proposed analytical models. The proposed analytical model can be implemented as a compact model for accurate circuit simulations.

• Proceedings of the KIPE Conference
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• 2008.06a
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• pp.511-513
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• 2008

Since conventional analysis of LLC resonant converter has a limit to explain a practical operation of LLC Resonant Converter, LLC resonant converter designed by conventional analysis can not regulate output voltage in several conditions. To solve this problem, analysis and design of LLC resonant converter including parasitic components is proposed. Experimental results are shown to confirm the feasibility of the proposed method.

• ETRI Journal
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• v.31 no.6
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• pp.741-748
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• 2009

We present an analysis of microstrip coupled lines (MCLs) used to improve the stability of a 60 GHz narrowband amplifier. The circuit has a 4-stage structure implementing MCLs instead of metal-insulator-metal (MIM) capacitors for the unconditional stability of the amplifier and yield enhancement. The stability parameter, U, is used to compare the stability of MCLs with that of MIM capacitors. Experimental results show that MCLs are more stable than MIM capacitors with the same capacitances as MCLs because the parasitic parallel resistances of MCLs are lower than those of MIM capacitors. Moreover, the bandwidth of an amplifier using MCLs is narrower than one using MIM capacitors because the parasitic series inductances of MCLs are higher than those of MIM capacitors.

• Journal of Power Electronics
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• v.19 no.2
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• pp.591-601
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• 2019

With the development of renewable energy, grid-connected inverter technology has become an important research area. When compared with traditional silicon IGBT power devices, the silicon carbide (SiC) MOSFET shows obvious advantages in terms of its high-power density, low power loss and high-efficiency power supply system. It is suggested that this technology is highly suitable for three-phase AC motors, renewable energy vehicles, aerospace and military power supplies, etc. This paper focuses on the SiC MOSFET behaviors that concern the parasitic component influence throughout the whole working process, which is based on a three-phase grid-connected inverter. A high-speed model of power switch devices is built and theoretically analyzed. Then the power loss is determined through experimental validation.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.5
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• pp.785-793
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• 2016

This paper analyzes an LCL-type isolated dc-dc converter operating for constant output voltage in the continuous conduction mode(CCM) with resistances of parasitic losses-static drain-source on resistance of power switch, ESR of resonant network(L-C-L)-using a high loaded quality factor Q assumptions and fourier series techniques. Simple analytical expressions for performance characteristics are derived under steady-state conditions for designing and understanding the behavior of the proposed converter. The voltage-driven rectifier is analyzed, taking into account the diode threshold voltage and the diode forward resistance. Experimental results measured for a proposed converter at low input voltage and various load resistances show agreement to the theoretical performance predicted by the analysis within maximum 4% error. Especially in the case of low output voltages and large loads, It is been observed that introduction of both rectifier and the parasitic components of converter had considerable effect on the performance.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2002.11a
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• pp.165-168
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• 2002

Accurate circuit simulation models for embedded RF passive components in LTCC provide a way to efficiently design high performance RF modules. Particularly, consideration of unavoidable parasitic components is required certainly. In this study, the parasitic components which is appeared from 3-D structure is considered.

• Journal of Power Electronics
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• v.18 no.3
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• pp.892-901
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• 2018

SiC MOSFETs have been used to improve system efficiency in high frequency converters due to their extremely high switching speed. However, this can result in undesirable parasitic oscillations in practical systems. In this paper, models of the key components are introduced first. Then, theoretical formulas are derived to calculate the switching oscillation frequencies after full turn-on and turn-off in clamped inductive circuits. Analysis indicates that the turn-on oscillation frequency depends on the power loop parasitic inductance and parasitic capacitances of the freewheeling diode and load inductor. On the other hand, the turn-off oscillation frequency is found to be determined by the output parasitic capacitance of the SiC MOSFET and power loop parasitic inductance. Moreover, the shifting regularity of the turn-off maximum peak voltage with a varying switching speed is investigated on the basis of time domain simulation. The distortion of the turn-on current is theoretically analyzed. Finally, experimental results verifying the above calculations and analyses are presented.

• KEPCO Journal on Electric Power and Energy
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• v.6 no.4
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• pp.473-480
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• 2020

In this paper, we proposed a high frequency equivalent circuit considering parasitic impedance components for differential noise analysis on the input stage during DC-DC buck converter switching operation. Based on the proposed equivalent circuit model, we presented a method to measure parasitic impedance parameters included in DC bus plate, IGBT, and PCB track using the gain phase method of a network analyzer. In order to verify the validity of this model, a DC-DC prototype consisting of a buck converter, a signal analyzer, and a LISN device, and then resonance frequency was measured in the frequency range between 150 kHz and 30 MHz. The validity of the parasitic impedance measurement method and the proposed equivalent model is verified by deriving that the measured resonance frequency and the resonance frequency of the proposed high frequency equivalent model are the same.