• Title/Summary/Keyword: Parasitic capacitor

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ZVS-PWM Boost Chopper-Fed DC-DC Converter with Load-Side Auxiliary Edge Resonant Snubber and Its Performance Evaluations

  • Ogura, Koki;Chandhaket, Srawouth;Ahmed, Tarek;Nakaoka, Mutsuo
    • Journal of Power Electronics
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    • v.4 no.1
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    • pp.46-55
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    • 2004
  • This paper presents a high-frequency ZVS-PWM boost chopper-fed DC-DC converter with a single active auxiliary edge resonant snubber in the load-side which can be designed for power conditioners such as solar photovoltaic generation, fuel cell generation, battery and super capacitor energy storages. Its principle operation in steady-state is described in addition to a prototype setup. The experimental results of ZVS-PWM boost chopper-fed DC-DC converter proposed here, are evaluated and verified with a practical design model in terms of its switching voltage and current waveforms, the switching v-i trajectory, the temperature performance of IGBT module, the actual power conversion efficiency and the EMI of radiated and conducted emissions. And then discussed and compared with the hard switching scheme from an experimental point of view. Finally, this paper proposes a practical method to suppress parasitic oscillation due to the active auxiliary resonant switch at ZCS turn off mode transition with the aid of an additional lossless clamping diode loop, and reduced the EMI conducted emission in this paper.

Soft-Switched PWM DC-DC High-Power Converter with Quasi Resonant-Poles and Parasitic Reactive Resonant Components of High-Voltage Transformer (부분 공진형 소프트 스위칭 PWM DC-DC 고전압 컨버터)

  • 김용주;신대철
    • The Transactions of the Korean Institute of Power Electronics
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    • v.4 no.4
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    • pp.384-394
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    • 1999
  • This paper deals with a fixed frequency full-bridge inverter type DC-DC high-power converter with high frequency high voltage(HFHV) transformer-coupled stage, which operates under quasi-resonant ZVS transition priciple in spite of a wide PWM-based voltage regulation processing and largely-changed load conditions. This multi-resonant(MR) converter topology is composed of a series capacitor-connected parallel resonant tank which makes the most of parasitic circuit reactive components of HFHV transformer and two additional quasi-resonant pole circuits incorporated into the bridge legs. The soft-switching operation and practical efficacy of this new converter circuit using the latest IGBTs are actually ascertained through 50kV trially-produced converter system operating using 20kHz/30kHz high voltage(HV) transformers which is applied for driving the diagnostic HV X-ray tube load in medical equipments. It is proved from a practical point of view that the switching losses of IGBTs and their electrical dynamic stresses relating to EMI noise can be considerably reduced under a high frequency(HF) switching-based phase-shift PWM control process for a load setting requirements.

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The operational characteristics of the AT Forward Multi-Resonant Converter (AT 포워드 다중 공진형 컨버터의 동작 특성)

  • 김창선
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.12 no.3
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    • pp.114-123
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    • 1998
  • The multi-resonant converter(MRC) minimizes a parasitic oscillation by using the resonant tank circuit absorbed parasitic reactances existing in a converter circuit. So it si possible that the converter operated at a high frequency has a high efficiency because the losses are reduced. Such a MHz high frequency applications provide a high power density [W/inch3] of the converter. But the resonant voltage stress across a switch of the resonant tank circuit is 4~5 times a input voltage. This h호 voltage stress increases the conduction loss because of on-resistance of a MOSFET with higher rating. Thus, in this paper we proposed the alternated multi-resonant converter (AT MRC) differ from the clamp mode multi-resonant converter and applicated it to the forward MRC. The AT forward MRC can reduce the voltage stress to 2~3 times a input voltage by using two series input capacitor. The control circuit is simple because tow resonant switches are driven directly by the output pulse of the voltage controled oscillator. This circuit type is verified through the experimental converter with 48V input voltage, 5V/50W output voltage/power and PSpice simulation. the measured maximum voltage stress is 170V of 2.9 times the input voltage and the maximum efficiency of 81.66% is measured.

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A 77 GHz 3-Stage Low Noise Amplifier with Cascode Structure Utilizing Positive Feedback Network using 0.13 μm CMOS Process

  • Lee, Choong-Hee;Choi, Woo-Yeol;Kim, Ji-Hoon;Kwon, Young-Woo
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.8 no.4
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    • pp.289-294
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    • 2008
  • A 77 GHz 3-stage low noise amplifier (LNA) employing one common source and two cascode stages is developed using $0.13{\mu}m$ CMOS process. To compensate for the low gain which is caused by lossy silicon substrate and parasitic element of CMOS transistor, positive feedback technique using parasitic inductance of bypass capacitor is adopted to cascode stages. The developed LNA shows gain of 7.2 dB, Sl1 of -16.5 dB and S22 of -19.8 dB at 77 GHz. The return loss bandwidth of LNA is 71.6 to 80.9 GHz (12%). The die size is as small as $0.7mm\times0.8mm$ by using bias line as inter-stage matching networks. This LNA shows possibility of 77 GHz automotive RADAR system using $0.13{\mu}m$ CMOS process, which has advantage in cost compared to sub-100 nm CMOS process.

Implementation of an LTCC RF Front-End Module Considering Parasitic Elements for Wi-Fi and WiMAX Applications (기생 성분을 고려한 Wi-Fi와 WiMAX용 LTCC 무선 전단부 모듈의 구현)

  • Kim, Dong-Ho;Baek, Gyung-Hoon;Kim, Dong-Su;Ryu, Jong-In;Kim, Jun-Chul;Park, Jong-Chul;Park, Chong-Dae
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.4
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    • pp.362-370
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    • 2010
  • In this paper, a compact RF Front-end module for Wireless Fidelity(Wi-Fi) and Worldwide Interoperability for Microwave Access(WiMAX) applications is realized by low temperature co-fired ceramic(LTCC) technology. The RF Front-end module is composed of three LTCC band-pass filters, a Film Bulk Acoustic Resonator(FBAR) filter, fully embedded matching circuits, an SPDT switch for mode selection, an SPDT switch for Tx/Rx selection, and an SP4T switch for band selection. The parasitic elements of 0.2~0.3 pF are generated by the structure of stacking in the top pad pattern for DC block capacitor of SPDT switch for mode selection. These kinds of parasitic elements break the matching characteristic, and thus, the overall electrical performance of the module is degraded. In order to compensate it, we insert a parallel lumped-element inductor on capacitor pad pattern for DC block, so that we obtain the optimized performance of the RF Front-end module. The fabricated RF front-end module has 12 layers including three inner grounds and it occupies less than $6.0mm{\times}6.0mm{\times}0.728mm$.

High Performance Wilkinson Power Divider Using Integrated Passive Technology on SI-GaAs Substrate

  • Wang, Cong;Qian, Cheng;Li, De-Zhong;Huang, Wen-Cheng;Kim, Nam-Young
    • Journal of electromagnetic engineering and science
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    • v.8 no.3
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    • pp.129-133
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    • 2008
  • An integrated passive device(IPD) technology by semi-insulating(SI)-GaAs-based fabrication has been developed to meet the ever increasing needs of size and cost reduction in wireless applications. This technology includes reliable NiCr thin film resistor, thick plated Cu/Au metal process to reduce resistive loss, high breakdown voltage metal-insulator-metal(MIM) capacitor due to a thinner dielectric thickness, lowest parasitic effect by multi air-bridged metal layers, air-bridges for inductor underpass and capacitor pick-up, and low chip cost by only 6 process layers. This paper presents the Wilkinson power divider with excellent performance for digital cellular system(DCS). The insertion loss of this power divider is - 0.43 dB and the port isolation greater than - 22 dB over the entire band. Return loss in input and output ports are - 23.4 dB and - 25.4 dB, respectively. The Wilkinson power divider based on SI-GaAs substrates is designed within die size of $1.42\;mm^2$.

A 1V 200-kS/s 10-bit Successive Approximation ADC

  • Uh, Ji-Hun;Kim, Sang-Hun;Jang, Young-Chan
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.05a
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    • pp.483-485
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    • 2010
  • A 200kS/s 10-bit successive approximation(SA) ADC with a rail-to-rail input range is proposed. The proposed SA ADC consists of DAC, comparator, and successive approximation register(SAR) logic. The folded-type capacitor DAC with the boosted NMOS switches is used to reduce the power consumption and chip area. Also, the time-domain comparator which uses a fully differential voltage-to-time converter improves the PSRR and CMRR. The SAR logic uses the flip-flop with a half valid window, it results in the reduction of the power consumption and chip area. The proposed SA ADC is designed by using a $0.18{\mu}m$ CMOS process with 1V supply.

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Augmentation of Fractional-Order PI Controller with Nonlinear Error-Modulator for Enhancing Robustness of DC-DC Boost Converters

  • Saleem, Omer;Rizwan, Mohsin;Khizar, Ahmad;Ahmad, Muaaz
    • Journal of Power Electronics
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    • v.19 no.4
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    • pp.835-845
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    • 2019
  • This paper presents a robust-optimal control strategy to improve the output-voltage error-tracking and control capability of a DC-DC boost converter. The proposed strategy employs an optimized Fractional-order Proportional-Integral (FoPI) controller that serves to eliminate oscillations, overshoots, undershoots and steady-state fluctuations. In order to significantly improve the error convergence-rate during a transient response, the FoPI controller is augmented with a pre-stage nonlinear error-modulator. The modulator combines the variations in the error and error-derivative via the signed-distance method. Then it feeds the aggregated-signal to a smooth sigmoidal control surface constituting an optimized hyperbolic secant function. The error-derivative is evaluated by measuring the output-capacitor current in order to compensate the hysteresis effect rendered by the parasitic impedances. The resulting modulated-signal is fed to the FoPI controller. The fixed controller parameters are meta-heuristically selected via a Particle-Swarm-Optimization (PSO) algorithm. The proposed control scheme exhibits rapid transits with improved damping in its response which aids in efficiently rejecting external disturbances such as load-transients and input-fluctuations. The superior robustness and time-optimality of the proposed control strategy is validated via experimental results.

Design of active beam steering antenna mounted on LEO small satellite (저궤도 소형위성 탑재용 빔 조향 능동 다이폴 안테나 설계)

  • Jeong, Jae-Yeop;Park, Jong-Hwan;Woo, Jong-Myung
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.16 no.5
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    • pp.197-203
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    • 2016
  • In this paper, the dipole antenna that can control a beam steering were designed for attaching on LEO(Low Earth Orbit) small satellite. The proposed antenna was based on Yagi-Uda antenna. The parasitic element was proposed as a T-shape. Depending on the state of open or short at the end of a vertical element, we can choose a characteristic of the parasitic element with fixing a vertical element length of the parasitic element. Using this characteristic, we designed the director element and reflector element. The proposed antenna was designed to receive UHF 436.5 MHz. Antenna gain was chosen by link budget between one satellite and the other satellite or between the satellite and the ground station. By changing a vertical element length which is the largest variable that chooses an antenna characteristic, we confirmed that ${\lambda}/2$ length transformer has a result that improve 0.5 dB in comparison ${\lambda}/4$ length transformer from maximum gain direction. In production, we made an on/off switch composed of a diode, capacitor, and inductor control an open and short at the end of the parasitic element. As a result, the gain of antenna used in a link between one satellite and the other satellite had average 5.92 dBi. And the gain of antenna used in a link between the satellite and the ground station had average 0.99 dBi.

A Charge Pump Design with Internal Pumping Capacitor for TFT-LCD Driver IC (내장형 펌핑 커패시터를 사용한 TFT-LCD 구동 IC용 전하펌프 설계)

  • Lim, Gyu-Ho;Song, Sung-Young;Park, Jeong-Hun;Li, Long-Zhen;Lee, Cheon-Hyo;Lee, Tae-Yeong;Cho, Gyu-Sam;Park, Mu-Hun;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.11 no.10
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    • pp.1899-1909
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    • 2007
  • A cross-coupled charge pump with internal pumping capacitor, witch is advantages from a point of minimizing TFT-LCD driver IC module, is newly proposed in this paper. By using a NMOS and a PMOS diode connected to boosting node from VIN node, the pumping node is precharged to the same value each pumping node at start pumping operation. Since the lust-stage charge pump is designed differently from the other stage pumps, a back current of pumped charge from charge pumping node to input stage is prevented. As a pumping clock driver is located the font side of pumping capacitor, the driving capacity is improved by reducing a voltage drop of the pumping clock line from parasitic resistor. Finally, a layout area is decreased more compared with conventional cross-coupled charge pump by using a stack-MIM capacitors. A proposed charge pump for TFT-LCD driver IC is designed with $0.13{\mu}m$ triple-well DDI process, fabricated, and tested.