• Journal of the Korean Magnetics Society
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• v.5 no.5
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• pp.828-832
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• 1995

This paper describes the efficient design, analysis method and experimental verification of capacitor discharge impulse magnetizer system. A capacitor discharge magnetizer system is used to produce a high current impulse of short duration in this magnetizing fixture. The parasitic resistance and parasitic inductance of the capacitor discharge impulse magnetizer system have been estimated using known air-core test coil. Finite element analysis (using MAXWELL 2-D field simulator) and magnetizing circuit analysis (using SPICE) are also used as part of the design and analysis process of the capacitor discharge impulse magnetizer system. Application study for a magnetizing fixture design is shown. 8-pole magnetizing fixture has been designed and analyzed using finite element analysis. The fixture design for 8-pole magnet are presented along with the experimental results. The experimental results have been achieved using a high-voltage, high-energy capacitor discharge impulse magnetizer and 8-pole iron core fixtures (charging voltage : 2000[V], capacitor bank : 4000[$\mu\textrm{F}$]).

• JSTS:Journal of Semiconductor Technology and Science
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• v.1 no.3
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• pp.189-192
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• 2001

A simple metal-insulator-metal (MIM) capacitor in a standard $0.25{\;}\mu\textrm{m}$ digital CMOS process is described. Using all six interconnect layers, this capacitor exploits both the lateral and vertical electrical fields to increase the capacitance density (capacitance per unit area). Compared to a conventional parallel plate capacitor in the four upper metal layers, this capacitor achieves lower parasitic substrate capacitance, and improves the capacitance density by a factor of 4. Measurements and an extracted model for the capacitor are also presented. Calculations, model and measurements agree very well.

• Journal of Sensor Science and Technology
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• v.21 no.3
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• pp.235-239
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• 2012

This paper presents frequency response compensation technique, and a self-oscillation circuit for capacitive microresonator with the compensation technique using programmable capacitor array, to compensate for the frequency response distorted by parasitic capacitances, and to obtain stable oscillation condition. The parasitic capacitances between the actuation input port and capacitive output port distort the frequency response of the microresonator. The distorted non-ideal frequency response can be compensated using two programmable capacitor arrays, which are connected between anti-phased actuation input port and capacitive output port. The simulation model includes the whole microresonator system, which consists of mechanical structure, transimpedance amplifier with automatic gain control, actuation driver and compensation circuit. The compensation operation and oscillation output of the system is verified with the simulation results.

• The Transactions of the Korean Institute of Power Electronics
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• v.21 no.1
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• pp.88-93
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• 2016

LCL filters are widely used in high-order harmonics attenuation of output currents in grid-connected inverters. However, output currents of grid-connected inverters with LCL filters can become unstable because of the resonance of the filters. Given that the characteristics of output currents in inverters mostly depend on filter performance, the exact analysis of filters by considering parasitic components is necessary for both harmonics attenuation and current control. LCL filters have three or four parasitic components: the series and/or parallel resistance of the filter capacitor and the series resistance of the two filter inductors. Most studies on LCL filters have focused on the parasitic components of the filter capacitor. Although several studies have addressed the parasitic components of the filter inductor at the inverter side, no study has yet investigated the concurrent effects of series resistance in both filter inductors in detail. This paper analyzes LCL filters by considering series resistance in both filter inductors; it proposes an active damping method based on the virtual series resistance of LCL filters. The performance of the proposed active damping is then verified through both simulation and experiment using Hardware-in-the-Loop Simulator(HILS).

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.217-221
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• 2001

This paper presents a new prototype of soft-switching DC-DC power converter with a high frequency transformer link which has two active power controlled switches in full bridge rectifier with capacitor input type smoothing filter. In this DC-DC converter, ZVS of the inverter in transformer primary side and ZCS of active rectifier area in secondary side can be completely achieved by taking advantage of parasitic inductor component of high-frequency transformer and loss less snubbing capacitors. Its operation principle and salient features are described. The steady-state operating characteristics of the proposed DC-DC power converter are illustrated and discussed on the basis of the simulation results in addition to the experimental ones obtained by 2kw-40kHz power converter breadboard set up.

• Proceedings of the KIPE Conference
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• 2013.07a
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• pp.347-349
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• 2013

This paper describes analysis and calculation of line frequency ripple current according to output capacitor value and effects of LED connection in the single stage flyback converter with high power factor. The low frequency output ripple current delivered from single stage converter has been analyzed in detail and the method evaluating parasitic resistance included in LED has been provided. In order to verify the equation derived in this paper, the single stage flyback converter has been designed with constant output current regulation with DCM operation. Experiments were conducted with different LED load structures to analyze the effect of LED parasitic resistance on output ripple current. As test results, the calculation can provide guide line to select capacitor values depending on output ripple current and LED characteristics.

• Proceedings of the KIPE Conference
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• 2012.07a
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• pp.592-593
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• 2012

Buck converter must operate at fairly high switching frequency for miniaturizing a whole circuit and achieving a fast response. However, at the conditions of low output voltage, high output current, and high switching frequency, the influence of parasitic elements to circuit operation will become extremely obvious. In this paper, it has been shown that these parasitic elements of output capacitor link the ripple of the output voltage. The MCP capacitors and aluminum electrolytic capacitors are applied to the buck converter and observed characteristics and the experimental results were reported.

• Journal of the Semiconductor & Display Technology
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• v.21 no.4
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• pp.45-49
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• 2022

Through Silicon Via (TSV) is a technology that interconnects chips through silicon vias. TSV technology can achieve shorter distance compared to wire bonding technology with excellent electrical characteristics. Due to this characteristic, it is currently being used in many fields that needs faster communication speed such as memory field. However, there is performance degradation issue on TSV technology due to the parasitic capacitance. To deal with this problem, in this study, the parasitic capacitance with TSV design factors is analyzed using commercial tool. TSV design factors were set in three categories: size, aspect ratio, pitch. Each factor was set by dividing the range with TSV used for memory and package. Ansys electronics desktop 2021 R2.2 Q3D was used for the simulation to acquire parasitic capacitance data. DOE analysis was performed based on the reaction surface method. As a result of the simulation, the most affected factors by the parasitic capacitance appeared in the order of size, pitch and aspect ratio. In the case of memory, each element interacted, and in the case of package, it was confirmed that size * pitch and size * aspect ratio interact, but pitch * aspect ratio does not interact.

• Proceedings of the KIPE Conference
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• 2014.07a
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• pp.237-238
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• 2014

A studies about HID resonanse ignition circuit. it need more than 2kV of the output voltage. then the breakdown voltage of the output capacitor must be higher, size of the capacitor must be larger, and price are higher. so were studied possible ways by resonating by distributing the secondary number of turns of the transformer, it would reduce the breakdown voltage of the output capacitor. we also studied the method can be lit at long distance, to control the resonance frequency in dependence on its parasitic capacitor that vary according to the length of the wire.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.45 no.8
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• pp.114-120
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• 2008

In this paper, we extract the parasitic elements of the metal-insulate-metal(MIM) capacitor using short-open calibration (SOC). The scattering matrixes of short, open, and MIM structures in strip lines are measured by full electro-magnetic (EM) simulator and vector network analyser. The full EM simulations are performed by finite element method (FEM) that was fitted three dimensional structure analysis. The electro-magnetic effects of MIM capacitor laminated in the multi-layered structures are proposed the II equivalent circuit with lumped elements, and the relations between the measured scattering parameters of the MIM structures and lumped elements in the circuits are shown by performing 2 port network analysis. The extracted lumped elements using the proposed SOC method are independent to frequencies.