• Title/Summary/Keyword: Parallel-circuit line

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DC Rail Side Series Switch and Parallel Capacitor Snubber-Assisted Edge Resonant Soft-Switching PWM DC-DC Converter with High-Frequency Transformer Link

  • Morimoto, Keiki;Fathy, Khairy;Ogiwara, Hiroyuki;Lee, Hyun-Woo;Nakaoka, Mutsuo
    • Journal of Power Electronics
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    • v.7 no.3
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    • pp.181-190
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    • 2007
  • This paper presents a novel circuit topology of a DC bus line series switch and parallel snubbing capacitor-assisted soft-switching PWM full-bridge inverter type DC-DC power converter with a high frequency planar transformer link, which is newly developed for high performance arc welding machines in industry. The proposed DC-DC power converter circuit is based upon a voltage source-fed H type full-bridge soft-switching PWM inverter with a high frequency transformer. This DC-DC power converter has a single power semiconductor switching device in series with an input DC low side rail and loss less snubbing capacitor in parallel with the inverter bridge legs. All the active power switches in the full-bridge arms and DC bus line can achieve ZCS turn-on and ZVS turn-off transition commutation. Consequently, the total switching power losses occurred at turn-off switching transition of these power semiconductor devices; IGBTs can be reduced even in higher switching frequency bands ranging from 20 kHz to 100 kHz. The switching frequency of this DC-DC power converter using IGBT power modules can be realized at 60 kHz. It is proved experimentally by power loss analysis that the more the switching frequency increases, the more the proposed DC-DC power converter can achieve a higher control response performance and size miniaturization. The practical and inherent effectiveness of the new DC-DC converter topology proposed here is actually confirmed for low voltage and large current DC-DC power supplies (32V, 300A) for TIG arc welding applications in industry.

A Study on the Removing Method of Hunting by Equalizing Line during Parallel Running of alternator Equipped with converter (컨버터가 내장된 교류발전기 병렬운전중의 헌팅을 균압선을 이용해 제거하는 방법에 관한 연구)

  • 노창주
    • Journal of Advanced Marine Engineering and Technology
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    • v.23 no.3
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    • pp.352-359
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    • 1999
  • This paper is a research for removing the alternators hunting which came about during the par-allel running. The four-pole six-phase alternator is equipped with the converter made out of twelve diodes to rectify all the waves. The hunting came about during the battery charging due to the hunting inducing point existed in r. p. m band 1575[rpm-1690[rpm] To remove the hunting inducing point We modified the four-pole six-phase alternator into the four-pole twevel-phase and increased the short-circuit ratio by decreasing the field coil pitch and increasing the field coil turns. But this method has two defects the first the alternator structure becomes complicating and the second the second the alternator equipped with the converter used in general purpose lately such as the car alternator can not be run in parallel wlthout modifying. To remove the defects the equalizing line was connected between the same phase of the alterna-tor to flow the synchronizing current which syncronize the phases of generator electromotive forces by which the alternator can be run in parallel without reference to the hunting inducing point and without modifying.

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Safely Evaluation on Common Grounding System for Electric Railway (전기철도의 공용접지 시스템에 대한 안정성 평가에 관한 연구)

  • Song, Jin-Ho;Hwang, Yu-Mo
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.51 no.6
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    • pp.298-306
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    • 2002
  • We performed an safety evaluation on constructing of a common grounding system for electrical railway in view of its efficacy and technical fit. In order to compare the conventional grounding method, which has been individually conducted, with the common grounding with all ground wires connected in common to the counterpoise buried below the surface of the earth in parallel with rail, we set up scenarios with several cases of fault and load conditions in Chungbuk railway sections with the common grounding system. Based on models for railway conductors including the grounded system, line Parameters of railway power system are computed. The circuit model for power system with up and down lines, auto-transformers and railway substations is used to compute impedances of counterpoise and substation ground net. For each scenario with faults and operation conditions of railway, the induced potentials on signal and communication lines are also computed. It is shown that the common grounding for Chungbuk railway is superior experimentally to the conventional method in three respects: (1) the lower rail potentials during operation of railway in line, (2) the lower rail potentials for short-circuit faults between catenary and rail, and (3) the lower stress voltages on signal and communication lines for short-circuit or ground faults. The analysis results confirm that the grounding system for electric railway is required to be built by the common grounding and be evaluated on its safety in design.

Small Broadband Rectangular Disk-Loaded Monopole Antenna with Electromagnetically Coupled Feed (전자기적 결합 급전 소형 광대역 사각 디스크-로디드 모노폴 안테나)

  • 정종호;박익모
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.15 no.7
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    • pp.653-660
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    • 2004
  • This paper presents monopole antenna with electromagnetically coupled feed and its equivalent circuit model. The proposed structure is consists of a rectangular disk-loaded monopole and a probe with rectangular spiral strip line feed. The rectangular disk-loaded monopole is represented by parallel RLC resonant circuit and the probe with rectangular spiral strip line feed is represented by series RLC resonant circuit. Therefore broad bandwidth can be achieved through electromagnetic coupling between these structures that generate two resonances within close frequency range. The antenna with electrical dimensions of only 0.075λ$\sub$0/${\times}$0.075λ$\sub$0/${\times}$0.075λ$\sub$0/ has 16.5 % fractional bandwidth for VSWR$\leq$2 at a center frequency of 2.038GHz.

An Efficient Built-in Self-Test Algorithm for Neighborhood Pattern- and Bit-Line-Sensitive Faults in High-Density Memories

  • Kang, Dong-Chual;Park, Sung-Min;Cho, Sang-Bock
    • ETRI Journal
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    • v.26 no.6
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    • pp.520-534
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    • 2004
  • As the density of memories increases, unwanted interference between cells and the coupling noise between bit-lines become significant, requiring parallel testing. Testing high-density memories for a high degree of fault coverage requires either a relatively large number of test vectors or a significant amount of additional test circuitry. This paper proposes a new tiling method and an efficient built-in self-test (BIST) algorithm for neighborhood pattern-sensitive faults (NPSFs) and new neighborhood bit-line sensitive faults (NBLSFs). Instead of the conventional five-cell and nine-cell physical neighborhood layouts to test memory cells, a four-cell layout is utilized. This four-cell layout needs smaller test vectors, provides easier hardware implementation, and is more appropriate for both NPSFs and NBLSFs detection. A CMOS column decoder and the parallel comparator proposed by P. Mazumder are modified to implement the test procedure. Consequently, these reduce the number of transistors used for a BIST circuit. Also, we present algorithm properties such as the capability to detect stuck-at faults, transition faults, conventional pattern-sensitive faults, and neighborhood bit-line sensitive faults.

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Current Limiting and Interrupting Operation of Hybrid Self-Excited Type Superconducting DCCB

  • Choi, S.J.;Lim, S.H.
    • Progress in Superconductivity and Cryogenics
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    • v.20 no.4
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    • pp.55-59
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    • 2018
  • Currently, the development of industry makes needs larger electric supply. Providers must consider the efficiency about losses and reliability of the system. In this case, DC power system can save electrical energy; long-distance transmission line losses. Relevance to switch technology with a voltage-source converter (VSC) in AC-DC conversion system have been researched. But, protection device of DC-link against fault current is still needed to study much. VSC DC power system is vulnerable to DC-cable short-circuit and ground faults, because DC-link has a huge size of capacitor filter which releases extremely large current during DC faults. Furthermore, DC has a fatal flaw that current zero crossing is nonexistence. To interrupt the DC, several methods which make a zero crossing is used; parallel connecting self-excited series LC circuit with main switch, LC circuit with power electronic device called hybrid DC circuit breaker. Meanwhile, self-excited oscillator needs a huge size capacitor that produces big oscillation current which makes zero crossing. This capacitor has a quite effective on the price of DCCB. In this paper, hybrid self-excited type superconducting DCCB which are using AC circuit breaker system is studied by simulation tool PSCAD/EMTDC.

Stopband-Extended and Size-Miniaturized Low-Pass Filter with Three Transmission Zeros

  • Li, Lin;Bao, Jia;Du, Jing-Jing;Wang, Yaming
    • ETRI Journal
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    • v.36 no.2
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    • pp.286-292
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    • 2014
  • This paper presents a compact structure composed of an upper high-impedance transmission line, a middle extended parallel coupled line, and a pair of inter-coupled symmetrical stepped impedance stubs. Detailed investigation into this structure based on an equivalent circuit analysis reveals that this proposed structure exhibits a quasi-elliptic low-pass filtering response with three transmission zeros. Moreover, the positions of the three transmission zeros can be tuned and reallocated flexibly by choosing the proper circuit parameters. Finally, the design concept is validated through the design, fabrication, and measurement of two exemplary low-pass filters (LPFs) with one single unit and two cascaded asymmetric units. The measured results agree well with the simulated results. In addition, in the range of $1.42f_c$ to $7.03f_c$, the fabricated quasi-elliptic LPFs experimentally demonstrate a very wide upper-stopband of 20 dB using a compact size of only $0.0089{\lambda}_g{^2}$, where ${\lambda}_g$ is the guided wavelength of a $50{\Omega}$ transmission line at the central frequency.

A Fault Location Algorithm for a Single Line Ground Fault on a Multi-Terminal Transmission Line (다단자 송전계통에서의 1선지락 고장시 고장점 표정 알고리즘)

  • 강상희;노재근;권영진
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.52 no.2
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    • pp.121-133
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    • 2003
  • This paper presents a fault location algorithm for a single phase-to-ground fault on 3-terminal transmission systems. The method uses only the local end voltage and current signals. Other currents used for the algorithm are estimated by current distribution factors and the local end current. Negative sequence current is used to remove the effect of load current. Five distance equations based on Kirchhoff's voltage law are established for the location algorithm which can be applied to a parallel transmission line having a teed circuit. Separating the real and imaginary parts of each distance equation, final nonlinear equations that are functions of the fault location can be obtained. The Newton-Raphson method is then applied to calculate the estimated fault location. Among the solutions, a correct fault distance is selected by the conditions of the existence of solution. With the results of extensive S/W and H/W simulation tests, it was verified that the proposed algorithm can estimate an accurate fault distance in a 154kV model system.

Fault Location Algorithm using Software Fault Tolerance (Software Fault Tolerance를 이용한 송전선로의 고장점 표정 알고리즘)

  • Jang, Yong-Won;Han, Seung-Su;Kim, Won-Ha
    • Proceedings of the KIEE Conference
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    • 2003.11c
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    • pp.875-877
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    • 2003
  • This paper use fault location algorithm for single-phase-to-ground faults on the teed circuit of a parallel transmission line that use only local end voltage and current information. When Newton-Raphson iteration method is used, the Initial value may cause error or cause not suitable result. Suggested new calculation model uses NVP methodology, which is one of the fault tolerance technology to solve this problem. EMTP simulation result has shown effectiveness of the algorithm under various conditions.

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A VISION SYSTEM IN ROBOTIC WELDING

  • Absi Alfaro, S. C.
    • Proceedings of the KWS Conference
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    • 2002.10a
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    • pp.314-319
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    • 2002
  • The Automation and Control Group at the University of Brasilia is developing an automatic welding station based on an industrial robot and a controllable welding machine. Several techniques were applied in order to improve the quality of the welding joints. This paper deals with the implementation of a laser-based computer vision system to guide the robotic manipulator during the welding process. Currently the robot is taught to follow a prescribed trajectory which is recorded a repeated over and over relying on the repeatability specification from the robot manufacturer. The objective of the computer vision system is monitoring the actual trajectory followed by the welding torch and to evaluate deviations from the desired trajectory. The position errors then being transfer to a control algorithm in order to actuate the robotic manipulator and cancel the trajectory errors. The computer vision systems consists of a CCD camera attached to the welding torch, a laser emitting diode circuit, a PC computer-based frame grabber card, and a computer vision algorithm. The laser circuit establishes a sharp luminous reference line which images are captured through the video camera. The raw image data is then digitized and stored in the frame grabber card for further processing using specifically written algorithms. These image-processing algorithms give the actual welding path, the relative position between the pieces and the required corrections. Two case studies are considered: the first is the joining of two flat metal pieces; and the second is concerned with joining a cylindrical-shape piece to a flat surface. An implementation of this computer vision system using parallel computer processing is being studied.

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