• Title/Summary/Keyword: Parallel network

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Parallel implementation of a neural network-based realtime ATR system using a multicomputer (다중컴퓨터를 이용한 신경회로망 기반 실시간 자동 표적인식시스템의 병렬구현)

  • 전준형;김성완;김진호;최흥문
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.33B no.2
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    • pp.197-208
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    • 1996
  • A neural network-based PSRI(position, scale, and rotation invariant) feature extraction and ATR (automatic target recognition) system are proposed and an efficient parallel implementatio of the proposed system using multicomputer is also presented. In the proposed system, the scale and rotationinvariant features are extracted from the contour projection of the number of edge pixels on each of the concentric circles, which is input t the cooperative network. We proposed how to decide the optimum depth and the width of the parallel pipeline system for real time applications by modeling the proposed system into a parallel pipeline implementation method using transputers is also proposed. The implementation results show that we can extract PSRI features less sensitive to input variations, and the speedup of the proposed ATR system is about 7.55 for the various rotated and scaled targets using 8-node transputer system.

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Economic Power Dispatch with Discontinuous Fuel Cost Functions using Improved Parallel PSO

  • Mahdad, Belkacem;Bouktir, T.;Srairi, K.;Benbouzid, M.EL.
    • Journal of Electrical Engineering and Technology
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    • v.5 no.1
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    • pp.45-53
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    • 2010
  • This paper presents an improved parallel particle swarm optimization approach (IPPSO) based decomposed network for economic power dispatch with discontinuous fuel cost functions. The range of partial power demand corresponding to the partial output powers near the global optimal solution is determined by a flexible decomposed network strategy and then the final optimal solution is obtained by parallel Particle Swarm Optimization. The proposed approach tested on 6 generating units with smooth cost function, and to 26-bus (6 generating units) with consideration of prohibited zone effect, the simulation results compared with recent global optimization methods (Bee-OPF, GA, MTS, SA, PSO). From the different case studies, it is observed that the proposed approach provides qualitative solution with less computational time compared to various methods available in the literature survey.

Architectures of the Parallel, Self-Organizing Hierarchical Neural Networks (병렬 자구성 계층 신경망 (PSHINN)의 구조)

  • 윤영우;문태현;홍대식;강창언
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.31B no.1
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    • pp.88-98
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    • 1994
  • A new neural network architecture called the Parallel. Self-Organizing Hierarchical Neural Network (PSHNN) is presented. The new architecture involves a number of stages in which each stage can be a particular neural network (SNN). The experiments performed in comparison to multi-layered network with backpropagation training and indicated the superiority of the new architecture in the sense of classification accuracy, training time,parallelism.

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Implementation of High Speed Transfer System for HD Video Files using Parallel TCP (Parallel TCP 를 이용한 고속 HD 영상파일 전송시스템의 구현)

  • Park, Hyoungyill;Song, Byungjun;Lee, Junggyu;Shin, Yongtae
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2013.11a
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    • pp.20-23
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    • 2013
  • Recently for the transfer of large size video file between sites for high-definition craft editing used by broadcasting company the Public Network is used a lot. In the IP Public Network with QoS(Quality-of-Service) not guaranteed, degradation of performance has several causes. In this paper, we have analyzed the causes of low performance to transfer a large size HD video file in long distance, in order to maximize the effectiveness, the high efficiency network could be implemented enabling the highspeed of HD video file using the connection with networks between hosts through packet creation and multi-session of Parallel TCP. We survey the result of high speed transfer system and verify the efficient transfer method using Public IP Network for large HD video file transfer in broadcasting cooperation.

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A domain decomposition method applied to queuing network problems

  • Park, Pil-Seong
    • Communications of the Korean Mathematical Society
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    • v.10 no.3
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    • pp.735-750
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    • 1995
  • We present a domain decomposition algorithm for solving large sparse linear systems of equations arising from queuing networks. Such techniques are attractive since the problems in subdomains can be solved independently by parallel processors. Many of the methods proposed so far use some form of the preconditioned conjugate gradient method to deal with one large interface problem between subdomains. However, in this paper, we propose a "nested" domain decomposition method where the subsystems governing the interfaces are small enough so that they are easily solvable by direct methods on machines with many parallel processors. Convergence of the algorithms is also shown.lso shown.

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A Study on Sorting in A Computer Using The Binary Multi-level Multi-access Protocol

  • Jung Chang-Duk
    • Proceedings of the Korea Inteligent Information System Society Conference
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    • 2006.06a
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    • pp.303-310
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    • 2006
  • The sorting algorithms have been developed to take advantage of distributed computers. But the speedup of parallel sorting algorithms decrease rapidly with increased number of processors due to parallel processing overhead such as context switching time and inter-processor communication cost. In this paper, we propose a parallel sorting method which provides linear speedup of an optimal serial algorithm for a system with a large number of processors. This algorithm may even provide superlinear speedup for a practical system. The algorithm takes advantage of an interconnection network properties and its protocol.

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Estimation of Overflow Probabilities in Parallel Networks with Coupled Inputs

  • Lee, Jiyeon;Kweon, Min Hee
    • Communications for Statistical Applications and Methods
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    • v.8 no.1
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    • pp.257-269
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    • 2001
  • The simulation is used to estimate an overflow probability in a stable parallel network with coupled inputs. Since the general simulation needs extremely many trials to obtain such a small probability, the fast simulation is proposed to reduce trials instead. By using the Cramer’s theorem, we first obtain an optimally changed measure under which the variance of the estimator is minimized. Then, we use it to derive an importance sampling estimator of the overflow probability which enables us to perform the fast simulation.

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Application of the Hamiltonian circuit Latin square to a Parallel Routing Algorithm on Generalized Recursive Circulant Networks

  • Choi, Dongmin;Chung, Ilyong
    • Journal of Korea Multimedia Society
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    • v.18 no.9
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    • pp.1083-1090
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    • 2015
  • A generalized recursive circulant network(GR) is widely used in the design and implementation of local area networks and parallel processing architectures. In this paper, we investigate the routing of a message on this network, that is a key to the performance of this network. We would like to transmit maximum number of packets from a source node to a destination node simultaneously along paths on this network, where the ith packet traverses along the ith path. In order for all packets to arrive at the destination node securely, the ith path must be node-disjoint from all other paths. For construction of these paths, employing the Hamiltonian Circuit Latin Square(HCLS), a special class of (n x n) matrices, we present O(n2) parallel routing algorithm on generalized recursive circulant networks.

Optimal Parallel Implementation of an Optimization Neural Network by Using a Multicomputer System (다중 컴퓨터 시스템을 이용한 최적화 신경회로망의 최적 병렬구현)

  • 김진호;최흥문
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.28B no.12
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    • pp.75-82
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    • 1991
  • We proposed an optimal parallel implementation of an optimization neural network with linear increase of speedup by using multicomputer system and presented performance analysis model of the system. We extracted the temporal-and the spatial-parallelism from the optimization neural network and constructed a parallel pipeline processing model using the parallelism in order to achieve the maximum speedup and efficiency on the CSP architecture. The results of the experiments for the TSP using the Transputer system, show that the proposed system gives linear increase of speedup proportional to the size of the optimization neural network for more than 140 neurons, and we can have more than 98% of effeciency upto 16-node system.

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Shortest Path Calculation Using Parallel Processor System (병력구조 전산기를 이용한 최단 경로 계산)

  • 서창진;이장규
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.34 no.6
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    • pp.230-237
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    • 1985
  • Shortest path calculations for a large-scale network have to be performed using a decomposition techniqre, since the calculations require large memory size which increases by the square of the number of vertices in the network. Also, the calculation time increases by the cube of the number of vertices in the network. In the decomposition technique,the network is broken into a number of smaller size subnetworks for each of which shortest paths are computed. A union of the solutions provides the solution of the original network. In all of the decomposition algirithms developed up to now, boundary vertices which divide all the subnetworks have to be included in computing shortest paths for each subnetwork. In this paper, an improved algorithm is developed to reduce the number of boundary vertices to be engaged. In the algorithm, only those boundary vertices that are directly connected to the subnetwork are engaged. The algorithm is suitable for an application to real time computation using a parallel processor system which consists of a number of micro-computers or prcessors. The algorithm has been applied to a 39- vertex network and a 232-vertex network. The results show that it is efficient and has better performance than any other algorithms. A parallel processor system has been built employing an MZ-80 micro-computer and two Z-80 microprocessor kits. The former is used as a master processor and the latter as slave processors. The algorithm is embedded into the system and proven effective for real-time shortest path computations.

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