• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.125-125
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• 2010

The Hybrid Fault current limit combined the semiconductor switching components, for example IGBT, with mechanical fast switch reduced mechanical and thermal stress on electrical machines, for example circuit breaker, transformer, and so on, in the electric network. We had focused on reducing the voltage stress of the semiconductor switching components by the mechanical fast switch. As a result, we could dramatically reduce amount of semiconductor switching components only using parallel arrangement of them, not series.

• Proceedings of the Korean Operations and Management Science Society Conference
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• 2006.05a
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• pp.1133-1138
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• 2006

This paper considers a hybrid flow shop scheduling problem for the objective of minimizing the number of tardy jobs. The hybrid flow shop consists of two stages in series, each of which has multiple identical parallel machines, and the problem is to determine the allocation and sequence of jobs at each stage. A branch and bound algorithm that gives the optimal solutions is suggested that incorporates the methods to obtain the lower and upper bounds. Dominance properties are also derived to reduce the search space. To show the performance of the algorithm, computational experiments are done on randomly generated problems, and the results are reported.

• Journal of Korean Society of Industrial and Systems Engineering
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• v.27 no.2
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• pp.24-28
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• 2004

This paper considers a scheduling problem concerned with an assembly system where two components are first treated In their own parallel machines and then pulled to be assembled into a final product at a single assembly machine. The objective measure is the mean completion time of jobs(a finite number of products). Through characterizing solution properties, we obtain the worst case error bounds of an arbitrary permutation and a SPT based heuristic.

• Journal of Electrical Engineering and Technology
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• v.10 no.3
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• pp.812-819
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• 2015

This paper presents a new approach for simulating the internal faults of synchronous machines using distributed computing and Large Change Sensitivity (LCS) analysis. LCS analysis caters for a parallel solution of 3-phase model of a faulted machine within the symmetrical component-based model of interconnected network. The proposed method considers dynamic behavior of the faulty machine and connected system and tries to accurately solve the synchronous machine’s internal fault conditions in the system. The proposed method is implemented in stand-alone FORTRAN-based phasor software and the results have been compared with available recordings from real networks and precisely simulated faults by use of the ATP/EMTP as a time domain software package. An encouraging correlation between the simulation results using proposed method, ATP simulation and measurements was observed and reported. The simplified approach also enables engineers to quickly investigate their particular cases with a reasonable precision.

• Journal of Korean Institute of Industrial Engineers
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• v.33 no.2
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• pp.213-220
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• 2007

This paper considers a two-stage hybrid flow shop scheduling problem for the objective of minimizing the number of tardy jobs. Each job is processed through the two production stages in stages, each of which has multiple identical parallel machines. The problem is to determine the allocation and sequence of jobs at each stage. A branch and bound algorithm that gives the optimal solutions is suggested that incorporates the methods to obtain the lower and upper bounds. Dominance properties are also suggested to reduce the search space. To show the performance of the algorithm, computational experiments are done on randomly generated problems, and the results are reported.

• Transactions of the Korean Society of Automotive Engineers
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• v.2 no.5
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• pp.74-84
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• 1994

This paper discusses a method to generate the tool path for NC machining of automobile panel dies. The source data representing a panel die may be generated from digitizing machines, other CAD/CAM systems via IGES files, of compound surface models. From the source data, three types of interferencefree tool paths are generated automatically ; a parallel (Cartesian), an isometric, and a pencil cutting tool path. For the interference-free tool path, a polyhedral model composed of several triangles, and an 'offset triangle' approach are exploited. Finally, some practical examples are illustrated.

• The Journal of the Korea institute of electronic communication sciences
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• v.5 no.5
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• pp.444-448
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• 2010

RCR network[1] is a topology for interconnection networks having many desirable properties for building scalable parallel machines. This had been analyzed by Hu and Cao[2] to deal with problems of disconnected graph, bisection width and diameter. We analyze some properties of RCR again and revise the condition for connected graph and network diameter. And we present an efficient algorithm for finding next node on a shortest path.

• Proceedings of the Korea Information Processing Society Conference
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• 2002.04a
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• pp.411-414
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• 2002

상태도의 계층구조를 이용하여 모형 검사를 수행하는 연구들이 있었다. 기존 연구들은 상태도를 SMV 입력언어로 변환할 때, 계층 구조를 유지하였다. 비록 이러한 연구가 계층형 모형검사의 초기 시도에 기여를 했지만, SMV는 평탄화 된 구조를 이용한다는 점에서 실효성은 없다. 본 연구에서는, 계층구조를 평탄화 시킨 후 상태도를 병행적으로 실행되는 여러 개의 독립된 기계로 분리한다. 따라서, 상태도의 구조가 단순해지고 SMV 언어로 쉽게 상태도를 변환할 수 있다. 본 연구의 목적은 SMV를 이용하여 상태도를 모형 검사 할 때 SMV의 능력을 최대한 활용하고자 한다.

• Proceedings of the KIEE Conference
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• 1998.11b
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• pp.666-668
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• 1998

In this paper we illustrate the design of a node label data flow machine based on self-timed paradigm. Data flow machines differ from most other parallel architectures, they are based on the concept of the data-driven computation model instead of the program store computation model. Since the data-driven computation model provides the excution of instructions asynchronously, it is natural to implement a data flow machine using self timed circuits.

• Journal of Electrical Engineering and Technology
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• v.13 no.5
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• pp.1901-1907
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• 2018

This paper is a study for accurate iron loss calculation of a cylindrical linear machine for free piston engine. This study presents that it is possible to accurately predict power loss in ferromagnetic laminations under magnetic flux by specially considering the dependence of hysteresis, classical, and excess loss components on the magnetic induction derivative. Significant iron loss in the armature core will not only compromise the machine efficiency, but may also result in excessive heating, which could lead to irreversible deterioration in the machine performance. Thus, correct prediction of power losses under a distorted flux waveform is therefore an important prerequisite to machine design, particularly when dealing with large apparatus where stringent efficiency standards are required. Finally, it will be discussed about the iron loss in various materials of cylindrical linear electric machine by geometric and electrical parameters. It will give elaborate information about the perfect design and design rules of cylindrical linear machine and in parallel tools for the calculation, simulation and design will be available.