• Title/Summary/Keyword: Parallel data processing

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An Improvement on Multicode CDMA Systems Using a Convolutional Code and a Bi-Orthogonal Code (길쌈 부호와 이원 직교 부호에 의한 다중부호 부호분할 다원접속 시스템의 개선)

  • 김기범;신요안
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.23 no.7
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    • pp.1659-1666
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    • 1998
  • The multicode CDMA systems that are widely studied as an effective transmission methodology in the IMT-2000 systems, employ orthogonal codes to transform high rate data into parallel, low rate data for simultaneous transmission. In this paper, we propose a new multicode CDMA system which achieves the same data rate and processing gain of the conventional systems, while significantly improves bit error rate performance by exploiting a convolutional code with code rate r=1/2 and a bi-orthogonal code. The simulation results for synchronous systems using maximal ratio combining Rake receivers under additive white Gaussian noise and multi-path fading channels, show significant improviements by the proposed system.

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Archaeological Investigations in Urban Areas through Combined Application of Surface ERT and GPR Techniques

  • Papadopoulos, Nikos;Yi, Myeong-Jong;Sarris, Apostolos;Kim, Jung-Ho
    • 한국지구물리탐사학회:학술대회논문집
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    • 2008.10a
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    • pp.113-118
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    • 2008
  • Among the geophysical methods, Ground Penetrating Radar (GPR) and Electrical Resistivity Tomography (ERT) comprise the most promising techniques in resolving buried archaeological structures in urban territories. In this work, two case studies which involve an integrated geophysical survey employing the surface three dimensional (3D) ERT and GPR techniques, in order to archaeologically characterize the investigated areas, are presented. Totally more than 4000 square meters were investigated from the test field sites, which are located at the centre of two of the most populated cities of the island of Crete, in Greece. The ERT and the GPR data were collected along dense and parallel profiles. The subsurface resistivity structure was reconstructed by processing the apparent resistivity data with a 3D inversion algorithm. The GPR sections were processed with a systematic way applying specific filters to the data in order to enhance their information context. Finally, horizontal depth slices representing the 3D variation of the physical properties were created and the geophysical anomalies were interpreted in terms of possible archaeological structures. The subsequent excavations in one of the sites verified the geophysical results, enhancing the applicability of ERT and GPR techniques in the archaeological exploration of urban territories.

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A Study on the Hysteretic Model using Artificial Neural Network (인공신경망을 이용한 이력모델에 관한 연구)

  • 김호성;이승창;이학수;이원호
    • Proceedings of the Computational Structural Engineering Institute Conference
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    • 1999.10a
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    • pp.387-394
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    • 1999
  • Artificial Neural Network (ANN) is a computational model inspired by the structure and operations of the brain. It is massively parallel system consisting of a large number of highly interconnected and simple processing units. The purpose of this paper is to verify the applicability of ANN to predict experimental results through the use of measured experimental data. Although there have been accumulated data based on hysteretic characteristics of structural element with cyclic loading tests, it is difficult to directly apply them for the analysis of elastic and plastic response. Thus, simple models with mathematical formula such as Bi-Linear Model, Ramberg-Osgood Model, Degrading Tri Model, Takeda Model, Slip type Model, and etc, have been used. To verify the practicality and capability of this study, ANN is adapted to several models with mathematical formula using numerical data To show the efficiency of ANN in nonlinear analysis, it is important to determine the adequate input and output variables of hysteretic models and to minimize an error in ANN process. The application example is Beam-Column joint test using the ANN in modeling of the linear and nonlinear hysteretic behavior of structure.

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Design and Implementation of the 155Mbps Adaptive CODEC for Ka-band Satellite Communications

  • Park, Eun-A;Chang, Dae-Ig;Kim, Nae-Soo
    • Proceedings of the IEEK Conference
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    • 2002.07c
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    • pp.1940-1943
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    • 2002
  • In this paper, we presented the design and implementation of 155Mbps satellite Modem adaptively compensated against the rain attenuation. In order to compensate the rain attenuation over high-speed satellite ink, the adaptive coding schemes with variable coding rates and the pragmatic TCM that can be decoded both the QPSK and TC-8PSK using same Viterbi decoder was studied and analyzed. The pragmatic TCM with rate 213, selected to the optimal parameters for implementation, was modeled by VHDL in this paper. The key design issues are how to achieve a high data rate and how to integrated into a single ASIC chip various functions such as the different data rates, Scrambler/descrambler, Interleaver, Encoder/decoder, and BPSK/QPSK/8PSK modulator/demodulator. The implemented 155M0ps adaptive MODEM has the simplified interface circuits among the many functional blocks, and parallel processing architecture to achieve the high data rate. This 155Mbps adaptive MODEM was designed and implemented by single ASIC chip with the 0.25 $\mu\textrm{m}$ CMOS standard cell technology.

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M-VIA Implementation on a Gigabit Ethernet Card (기가비트 이더넷상에서의 M-VIA 구현)

  • 윤인수;정상화
    • Journal of KIISE:Computer Systems and Theory
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    • v.29 no.12
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    • pp.648-654
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    • 2002
  • The Virtual Interface Architecture(VIA) is an industry standard for communication over system area networks(SANs). M-VIA is a software implementation of VIA technology on Linux. In this paper, we implemented the M-VIA on an AceNIC Gigabit Ethernet by developing a new AceNIC driver for the M-VIA. We analyzed the M-VIA data segmentation processes. When a Gigabit Ethernet MTU is larger than 1514 bytes, M-VIA data segmentation size leaves much room for improvement. So we experimented with various MTU and M-VIA data segmentation size and compared the performances.

A Study on SLM Method for PAPR Reduction by Scaling without Side Information in WiBro Systems (WiBro 시스템에서 스케일링을 이용한 PAPR 감소를 위한 부정보가 없는 SLM 기법 연구)

  • Lee, Jae-Sun;Gwak, Do-Young;Kim, Jin-Young
    • 한국정보통신설비학회:학술대회논문집
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    • 2008.08a
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    • pp.389-393
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    • 2008
  • OFDM (Orthogonal Frequency Division Multiplexing) modulation using the orthogonal subcarriers reduces the delay spread by increasing robustness to multipath fading and can use overlapped bandwidth due to orthogonality on frequency domain. Thus data rate and spectral efficiency are increased. Because of these reason, OFDM is used for high speed data transmission for multimedia transmission as HSDPA, WiBro, WLAN. However OFDM also has drawbacks that have the high PAPR (Peak to Average Power Ratio). This high PAPR takes place because of parallel processing a number of data at once using a FFT processor. By high PAPR, amplifier doesn't act in dynamic range, so that BER performance is worse. In this paper, we reduce the PAPR using SLM(Selective Mapping). SLM doesn't effect on BER performance, but should transmit the side information for demodulation [2]. Also PAPR is higher as the number of FFT processor is larger. Thus SLM has high complexity. In this paper, we analyze the performance of SLM using scaling for no side information.

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The Procedure Transformation using Data Dependency Elimination Methods (자료 종속성 제거 방법을 이용한 프로시저 변환)

  • Jang, Yu-Suk;Park, Du-Sun
    • The KIPS Transactions:PartA
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    • v.9A no.1
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    • pp.37-44
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    • 2002
  • Most researches of transforming sequential programs into parallel programs have been based on the loop structure transformation method. However, most programs have implicit interprocedure parallelism. This paper suggests a way of extracting parallelism from the loops with procedure calls using the data dependency elimination method. Most parallelization of the loop with procedure calls have been conducted for extracting parallelism from the uniform code. In this paper, we propose interprocedural transformation, which can be apply to both uniform and nonuniform code. We show the examples of uniform, nonuniform, and complex code parallelization. We then evaluated the performance of the various transformation methods using the CRAY-T3E system. The comparison results show that the proposed algorithm out-performs other conventional methods.

The 64-Bit Scrambler Design of the OFDM Modulation for Vehicles Communications Technology (차량 통신 기술을 위한 OFDM 모듈레이션의 64-비트 스크램블러 설계)

  • Lee, Dae-Sik
    • Journal of Internet Computing and Services
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    • v.14 no.1
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    • pp.15-22
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    • 2013
  • WAVE(Wireless Access for Vehicular Environment) is new concepts and Vehicles communications technology using for ITS(Intelligent Transportation Systems) service by IEEE standard 802.11p. Also it increases the efficiency and safety of the traffic on the road. However, the efficiency of Scrambler bit computational algorithms of OFDM modulation in WAVE systems will fall as it is not able to process in parallel in terms of hardware and software. This paper proposes an algorithm to configure 64-bits matrix table in scambler bit computation as well as an algorithm to compute 64-bits matrix table and input data in parallel. The proposed algorithm on this thesis is executed using 64-bits matrix table. In the result, the processing speed for 1 and 1000 times is improved about 40.08% ~ 40.27% and processing rate per sec is performed more than 468.35 compared to bit operation scramble. And processing speed for 1 and 1000 times is improved about 7.53% ~ 7.84% and processing rate per sec is performed more than 91.44 compared to 32-bits operation scramble. Therefore, if the 64 bit-CPU is used for 64-bits executable scramble algorithm, it is improved more than 40% compare to 32-bits scrambler.

Development and run time assessment of the GPU accelerated technique of a 2-Dimensional model for high resolution flood simulation in wide area (광역 고해상도 홍수모의를 위한 2차원 모형의 GPU 가속기법 개발 및 실행시간 평가)

  • Choi, Yun Seok;Noh, Hui Seong;Choi, Cheon Kyu
    • Journal of Korea Water Resources Association
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    • v.55 no.12
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    • pp.991-998
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    • 2022
  • The purpose of this study is to develop GPU (Graphics Processing Unit) acceleration technique for 2-dimensional model and to assess the effectiveness for high resolution flood simulation in wide area In this study, GPU acceleration technique was implemented in the G2D (Grid based 2-Dimensional land surface flood model) model, using implicit scheme and uniform square grid, by using CUDA. The technique was applied to flood simulation in Jinju-si. The spatial resolution of the simulation domain is 10 m × 10 m, and the number of cells to calculate is 5,090,611. Flood period by typhoon Mitag, December 2019, was simulated. Rainfall radar data was applied to source term and measured discharge of Namgang-Dam (Ilryu-moon) and measured stream flow of Jinju-si (Oksan-gyo) were applied to boundary conditions. From this study, 2-dimensional flood model could be implemented to reproduce the measured water level in Nam-gang (Riv.). The results of GPU acceleration technique showed more faster flood simulation than the serial and parallel simulation using CPU (Central Processing Unit). This study can contribute to the study of developing GPU acceleration technique for 2-dimensional flood model using implicit scheme and simulating land surface flood in wide area.

A Walsh-Based Distributed Associative Memory with Genetic Algorithm Maximization of Storage Capacity for Face Recognition

  • Kim, Kyung-A;Oh, Se-Young
    • Proceedings of the Korean Institute of Intelligent Systems Conference
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    • 2003.09a
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    • pp.640-643
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    • 2003
  • A Walsh function based associative memory is capable of storing m patterns in a single pattern storage space with Walsh encoding of each pattern. Furthermore, each stored pattern can be matched against the stored patterns extremely fast using algorithmic parallel processing. As such, this special type of memory is ideal for real-time processing of large scale information. However this incredible efficiency generates large amount of crosstalk between stored patterns that incurs mis-recognition. This crosstalk is a function of the set of different sequencies [number of zero crossings] of the Walsh function associated with each pattern to be stored. This sequency set is thus optimized in this paper to minimize mis-recognition, as well as to maximize memory saying. In this paper, this Walsh memory has been applied to the problem of face recognition, where PCA is applied to dimensionality reduction. The maximum Walsh spectral component and genetic algorithm (GA) are applied to determine the optimal Walsh function set to be associated with the data to be stored. The experimental results indicate that the proposed methods provide a novel and robust technology to achieve an error-free, real-time, and memory-saving recognition of large scale patterns.

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