• Title/Summary/Keyword: Parallel data processing

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VLSI Design of Cryptographic Processor for SEED and Triple DES Encryption Algorithm (SEED 와 TDES 암호 알고리즘을 구현하는 암호 프로세서의 VLSI 설계)

  • 정진욱;최병윤
    • Proceedings of the IEEK Conference
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    • 2000.06b
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    • pp.169-172
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    • 2000
  • This paper describes design of cryptographic processor which can execute SEED, DES, and triple DES encryption algorithm. To satisfy flexible architecture and area-efficient structure, the processor has I unrolled loop structure with hardware sharing and can support four standard mode, such as ECB, CBC, CFB, and OFB modes. To reduce overhead of key computation, the precomputation technique is used. Also to eliminate increase of processing time due to data input and output time, background I/O technique is used which data input and output operation execute in parallel with encryption operation of cryptographic processor. The cryptographic processor is designed using 2.5V 0.25 $\mu\textrm{m}$ CMOS technology and consists of about 34.8K gates. Its peak performances is about 250 Mbps under 100 Mhz ECB SEED mode and 125 Mbps under 100 Mhz triple DES mode.

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Performance Evaluation of Unimodular and Non-unimodular Transformation (Unimodular 및 Non-unimodular 변환의 성능평가)

  • Song Worl-Bong
    • Journal of the Korea Computer Industry Society
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    • v.6 no.2
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    • pp.365-372
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    • 2005
  • Generally, In a application program the core part for parallel processing is a loop. therefore exist data dependencies between the array index variables of a loop. The data dependence relations between statements which from variable or constant dependence distance are specially complex. Therefore extracting parallelism for those statements at compile time is very difficult. in this paper, among the proposed methods of extracting parallelism, analysis the unimodular method and non-unimodular method and grasping the merits and demerits of them. hereafter, this method will go far toward solving the effectively extracting parallelism of the loop.

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Three-Dimensional Borehole Radar Modeling (3차원 시추공 레이다 모델링)

  • 예병주
    • Economic and Environmental Geology
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    • v.33 no.1
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    • pp.41-50
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    • 2000
  • Geo-radar survey which has the advantage of high-resolution and relatively fast survey has been widely used for engineering and environmental problems. Three-dimensional effects have to be considered in the interpretation of geo-radar for high-resolution. However, there exists a trouble on the analysis of the three dimensional effects. To solve this problem an efficient three dimension numerical modeling algorithm is needed. Numerical radar modeling in three dimensional case requires large memory and long calculating time. In this paper, a finite difference method time domain solution to Maxwell's equations for simulating electromagnetic wave propagation in three dimensional media was developed to make economic algorithm which requires smaller memory and shorter calculating time. And in using boundary condition Liao absorption boundary. The numerical result of cross-hole radar survey for tunnel is compared with real data. The two results are well matched. To prove application to three dimensional analysis, the results with variation of tunnel's incident angle to survey cross-section and the result when the tunnel is parallel to the cross-section were examined. This algorithm is useful in various geo-radar survey and can give basic data to develop dat processing and inversion program.

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Design of High-speed Pointer Switching Fabric (초고속 포인터 스위칭 패브릭의 설계)

  • Ryu, Kyoung-Sook;Choe, Byeong-Seog
    • Journal of Internet Computing and Services
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    • v.8 no.5
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    • pp.161-170
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    • 2007
  • The proposed switch which has separated data plane and switching plane can make parallel processing for packet data storing, memory address pointer switching and simultaneously can be capable of switching the variable length for IP packets. The proposed architecture does not require the complicated arbitration algorithms in VOQ, also is designed for QoS of generic output queue switch as well as input queue. At the result of simulations, the proposed architecture has less average packet delay than the one of the memory-sharing based architecture and guarantees keeping a certain average packet delay in increasing switch size.

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VLSI Design of Cryptographic Processor for Triple DES and DES Encryption Algorithm (3중 DES와 DES 암호 알고리즘용 암호 프로세서와 VLSI 설계)

  • 정진욱;최병윤
    • Proceedings of the Korea Multimedia Society Conference
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    • 2000.04a
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    • pp.117-120
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    • 2000
  • This paper describe VLSL design of crytographic processor which can execute triple DES and DES encryption algorithm. To satisfy flexible architecture and area-efficient structure, the processor has 1 unrolled loop structure without pipeline and can support four standard mode, such as ECB, CBC, CFB, and OFB modes. To reduce overhead of key computation , the key precomputation technique is used. Also to eliminate increase of processing time due to data input and output time, background I/O techniques is used which data input and output operation execute in parallel with encryption operation of cryptographic processor. The cryptographic processor is implemented using Altera EPF10K40RC208-4 devices and has peak performance of about 75 Mbps under 20 Mhz ECB DES mode and 25 Mbps uder 20 Mhz triple DES mode.

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Volume Holographic Fingerprint Recognition System for Personal Identification (개인 인증을 위한 체적 홀로그래픽 지문인식 시스템)

  • 이승현
    • Journal of the Korean Society of Safety
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    • v.13 no.4
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    • pp.256-263
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    • 1998
  • In this paper, we propose a volume holographic fingerprint recognition system based on optical correlator for personal identification. Optical correlator has high speed and parallel processing characteristics of optics. Matched filters are recorded into a volume hologram that can store data with high density, transfer them with high speed, and select a randomly chosen data element. The multiple reference images of database are prerecorded in a photorefractive crystal in the form of Fourier transform images, simply by passing the image displayed in a spatial light modulator through a Fourier transform lens. The angular multiplexing method for multiple holograms of database can be achieved by rotating the crystal by use of a step motor. Experimental results show that the proposed system can be used for the security verification system.

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Design and Implementation of Hangul Graphic Board to Speed up the Generation of High Resolution Fonts used in Electric Public System (전자 출판 시스템에 사용되는 고해상도 문자의 발생을 가속시키기 위한 한글 그래픽 보드의 설게 및 제작)

  • 황규철;경종민
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.27 no.5
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    • pp.802-807
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    • 1990
  • In this thesis, we represent the study on the design and implementation of the hangul graphic board which generate bit map font data from the boundary information of korean or chines fonts. The implemented graphic board consists of a TMS34010 Graphic System Processor (GSP) and two TMS320C25 Digital Signal Processor (DSP), and there is shared memory which consists of two memory blocks with same address for which is possible parallel processing between two processors. And in using DSP, we propose an efficient algorithm for calculation of Bezier curve which require much times to calculate bit map data font from the boundary information.

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A new approach for the saccadic eye movement system simulation (Saccade 안구운동계의 시뮬레이션)

  • 박상희;남문현
    • 전기의세계
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    • v.26 no.1
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    • pp.87-90
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    • 1977
  • Various simulation techniques were developed in the modeling of biological system during the last decades. Mostly analog and hybrid simulation techniques have been used. The authors chose the Digital Analog Simulation (DAS) technique by using the MIMIC language to simulate the saccadic eye movement system performances on the digital computer. There have been various models presented by many investigators after Young & Stark's sampled-data model. The eye movement model chosen by the authors is Robinson's model III which shows the parallel information processing characteristics clearly to the double-step input stimuli. In the process of simulation, the parameter and constants used were based on the neurophysiological data of the human and animals. The analog model blocks were converted to the corresponding MIMIC block diagrams and programmed into the MIMIC statements. The program was run on the CDC Cyber 72-14 computer. The essential input stimulus was double-step of 5 and 10 degrees, and target durations chosen were 50,100 and 150 msec. The results obtained by the DAS technqiue were in good agreement with analog simulation carried out by other investigators as well as with the experimental human saccadic eye movement responses to double-step target movements.

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A Study on the Auto-diagnosis Plethysmograph by Novel Algorithm for Radial Pulse Detection (새로운 맥파 인식 알고리즘을 적용한 자동 맥파 시스템에 관한 연구)

  • 박승환;홍승홍
    • Journal of Biomedical Engineering Research
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    • v.17 no.2
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    • pp.241-246
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    • 1996
  • This paper describes a new system that detects radial pulse wave and allows the diagnosis of malfunctions of cardiovascular system by analyzing the waveforms with the newly proposed algorithm. The system consists of a sensor part and a data processing part within which a new detection algorithm is incorporated In acquiring radial pulse signal noninvasively, the sensor used in this system is a new combinational fiber-optic sensor which has a detecting Part and a transmitting Part. Also, In order to analyze the characteristics of pulsation quantitatively, the algorithm proposed in this paper is a method that runs in parallel with both the data of ECG and differential pulse simultaneously. these concepts are based upon the idea that thfee Q points of ECG give obious discrimination of one entire period of pulse in any abnormal cases, and newly defined feature lines at the differential counterpart can be used to recogrlize sDme significant points in one period of pulses.

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Bit-rate Scalable Video Coder Using a $2{\times}2{\times}2$ DCT for Progressive Transmission

  • Woo, Seock-Hoon;Park, Jin-Hyung;Won, Chee-Sun
    • Proceedings of the IEEK Conference
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    • 2000.07a
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    • pp.66-69
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    • 2000
  • In this paper, we propose a progressive transmission of a video using a 2$\times$2$\times$2 DCT First of all, the video data is transformed into multiresolution represented video data using a 2$\times$2$\times$2 DCT. Then. it is represented by a 3-D EZT(Embedded Zero Tree) coding fur the progressive transmission with a bit-rate scalability. The proposed progressive transmission algorithm needs much less computations and buffer memories than the higher-order convolution based wavelet filter. Also, since the 2$\times$2$\times$2 DCT requires independent local computations, parallel processing can be applied.

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