• KIPS Transactions on Software and Data Engineering
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• v.4 no.11
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• pp.529-536
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• 2015

When rendering both three-dimensional objects and photo images together, the non-photorealistic rendering results are in visual discord since the two contents have their own independent color distributions. This paper proposes a non-photorealistic rendering technique which renders both three-dimensional objects and photo images such as cartoons and sketches. The proposed technique computes the color distribution property of the photo images and reduces the number of colors of both photo images and 3D objects. NPR is performed based on the reduced colormaps and edge features. To enhance the natural scene presentation, the image region segmentation process is preferred when extracting and applying colormaps. However, the image segmentation technique needs a lot of computational operations. It takes a long time for non-photorealistic rendering for large size frames. To speed up the time-consuming segmentation procedure, we use GPGPU for the parallel computing using the GPU. As a result, we significantly improve the execution speed of the algorithm.

• Proceedings of the Korea Institute of Convergence Signal Processing
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• 2000.12a
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• pp.13-16
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• 2000

In the recent mobile communication systems, the performance of Turbo Code using the error correction coding depends on the interleaver influencing the free distance determination and the recursive decoding algorithms that is executed in the turbo decoder. However, performance depends on the interleaver depth that need great many delay over the reception process. Moreover, Turbo Code has been known as the robust coding methods with the confidence over the fading channel. The International Telecommunication Union(ITU) has recently adopted as the standardization of the channel coding over the third generation mobile communications the same as IMT-2000. Therefore, in this paper, we proposed of that has the better performance than existing Turbo Decoder that has the parallel concatenated four-step structure using MAP algorithm. In the real-time voice and video service over the third generation mobile communications, the performance of the proposed method was analyzed by the reduced decoding delay using the variable decoding method by computer simulation over AWGN and lading channels.

• The KIPS Transactions:PartA
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• v.12A no.2 s.92
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• pp.87-94
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• 2005

Pattern matching is one of critical parts of Network Intrusion Prevention Systems (NIPS) and computationally intensive. To handle a large number of attack signature fattens increasing everyday, a network intrusion prevention system requires a multi pattern matching method that can meet the line speed of packet transfer. In this paper, we analyze Snort, a widely used open source network intrusion prevention/detection system, and its pattern matching characteristics. A multi pattern matching method for NIPS should efficiently handle a large number of patterns with a wide range of pattern lengths and case insensitive patterns matches. It should also be able to process multiple input characters in parallel. We propose a multi pattern matching hardware accelerator based on Shift-OR pattern matching algorithm. We evaluate the performance of the pattern matching accelerator under various assumptions. The performance evaluation shows that the pattern matching accelerator can be more than 80 times faster than the fastest software multi-pattern matching method used in Snort.

• The Transactions of the Korean Institute of Power Electronics
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• v.11 no.6
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• pp.535-542
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• 2006

A large signal stability analysis of the solar array regulator system is performed to facilitate the design and analysis of a Low-Earth-Orbit satellite power system. The effective load characteristics of every controllable method in the solar array system are classified to analyze the large signal stability. Then, using the state plane analysis technique, the stability of various equilibrium points is analyzed. A nonlinear transformation algorithm, which changes the effective load characteristic of the solar array regulator as constant resistive load, is also proposed for the large signal stability. The proposed resistive current mode control system can control the solar array output for purposes such as peak power tracking control and battery charging control. For the verification of the proposed large signal analysis and resistive current mode control, a solar array regulator system consisting of two 100W parallel module buck converters has been built and tested using a real 200W solar array.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.12 no.4
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• pp.1575-1580
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• 2011

A key factor in the study of hybrid vehicle is to enhance the usability of energy. The paper introduces the monitor and controlling technology of hybrid vehicle that can process the relevant information considering the structure of power system and driving strategies simultaneously, and can monitor its results. This technology, so called HEV algorithm analysis, has been applied to PRIUS THS made by Toyota Co. LTD. This model is adapted to parallel hybrid type. It has a somewhat comlex structure, but has several merits. It's energy loss is lower when conversing. and also it is easily applied to the conventional vehicle having a gasoline engine without any overall changing of its structure, and so on. This monitor and controlling technology is very useful to study on the various driving strategies of hybrid vehicle for maximizing the usability between engine and electric motor.

• The KIPS Transactions:PartA
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• v.8A no.4
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• pp.447-454
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• 2001

Various caching and prefetching algorithms have been investigated to identify and effective method for improving the performance of I/O devices. A prefetching algorithm decreases the processing time of a system by reducing the number of disk accesses when an I/O is needed. This paper proposes an AMBA prefetching method that is an extended version of the OBA prefetching method. The AMBA prefetching method will prefetching blocks continuously as long as disk bandwidth is enough. In this method, though there were excessive data request rate, we would expect efficient prefetching. And in the AMBA prefetching method, to prevent the cache pollution, it limits the number of data blocks to be prefetched within the cache area. It can be implemented in a user-level File System based on a Linux Operating System. In particular, the proposed prefetching policy improves the system performance by about 30∼40% for large files that are accessed sequentially.

• Transactions of the Korean Society of Mechanical Engineers
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• v.12 no.5
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• pp.1158-1174
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• 1988

A numerical technique is developed for the solution of fully developed turbulent recirculating flow in the passage of variable area using the non-orthogonal coordinate transformation. In the numerical analysis, primitive pressure-velocity finite difference equations were solved by SIMPLER algorithm with 2-equation turbulence model and algebraic stress model (ASM). QUICK scheme on the differencing of convective terms which is free from the inaccuracies of numerical diffusion has been applied to the variable grids and the results compared with those from HYBRID scheme. In order to test the effect of streamline curvatures on turbulent diffusion Lee and Choi streamline curvature correction model which has been obtained by modifying the Leschziner and Rodi's model is testes. The ASM was also employed and the results are compared to those from another turbulence model. The results show that difference of convective differencing schemes and turbulence models give significant differences in the prediction of velocity fields in the expansion region and outlet region of the combustor, however show little differences in the parallel flow region.

• Journal of Korea Society of Industrial Information Systems
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• v.13 no.1
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• pp.37-45
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• 2008

This paper proposes a half-silvered mirror display system designed to demonstrate useful information about things on display into the air. It helps the spectators gain quick access to information near the area where the things are put on display. This paper deals with three matters: First, tracking based on camera images created in real time enables the provision of information about the things that are both still and moving. Second, as information is output based on the real-time coordinates of things on display, the parallel processing-based tracking algorithm is used to ensure smooth transfer. Third, a half-mirror is placed in front of the display area to establish an augmented reality system and visual distortion caused by mirror angle is adjusted by the reflection transformation matrix. The objectives of this system are to arouse the spectators' interest in things on display and offer easy and quick access to information about them.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.7
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• pp.40-48
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• 2015

An optical network-on-chip(ONoC) architecture is emerging as a new paradigm for solving on-chip communication bottleneck. Recent studies on ONoC have been focusing on supporting the parallel transmission and avoiding path collisions using wavelength division multiplexing(WDM). However, since the maximum number of wavelengths, which a single waveguide can accommodate is limited by crosstalk and insertion loss. Therefore previous WDM studies based on incrementing the number of different wavelengths according to the number of nodes would be infeasible due to the implementation complexity. To solve such problems, we combined time division multiplexing(TDM) and wavelength-routed ONoC, along with an optimized channel allocation algorithm, which can minimize the number of extra wavelength channels and latency caused by combining TDM scheme.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.6
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• pp.1056-1063
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• 2008

This paper describes an efficient design of a multi-standard Viterbi decoder that supports multiple constraint lengths and code rates. The Viterbi decoder is parameterized for the code rates 1/2, 1/3 and constraint lengths 7,9, thus it has four operation nodes. In order to achieve low hardware complexity and low power, an efficient architecture based on hardware sharing techniques is devised. Also, the optimization of ACCS (Accumulate-Subtract) circuit for the one-point trace-back algorithm reduces its area by about 35% compared to the full parallel ACCS circuit. The parameterized Viterbi decoder core has 79,818 gates and 25,600 bits memory, and the estimated throughput is about 105 Mbps at 70 MHz clock frequency. Also, the simulation results for BER (Bit Error Rate) performance show that the Viterbi decoder has BER of $10^{-4}$ at $E_b/N_o$ of 3.6 dB when it operates with code rate 1/3 and constraints 7.