• Title/Summary/Keyword: Parallel algorithm

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PC Cluster based Parallel Adaptive Evolutionary Algorithm for Service Restoration of Distribution Systems

  • Mun, Kyeong-Jun;Lee, Hwa-Seok;Park, June-Ho;Kim, Hyung-Su;Hwang, Gi-Hyun
    • Journal of Electrical Engineering and Technology
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    • v.1 no.4
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    • pp.435-447
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    • 2006
  • This paper presents an application of the parallel Adaptive Evolutionary Algorithm (AEA) to search an optimal solution of the service restoration in electric power distribution systems, which is a discrete optimization problem. The main objective of service restoration is, when a fault or overload occurs, to restore as much load as possible by transferring the de-energized load in the out of service area via network reconfiguration to the appropriate adjacent feeders at minimum operational cost without violating operating constraints. This problem has many constraints and it is very difficult to find the optimal solution because of its numerous local minima. In this investigation, a parallel AEA was developed for the service restoration of the distribution systems. In parallel AEA, a genetic algorithm (GA) and an evolution strategy (ES) in an adaptive manner are used in order to combine the merits of two different evolutionary algorithms: the global search capability of the GA and the local search capability of the ES. In the reproduction procedure, proportions of the population by GA and ES are adaptively modulated according to the fitness. After AEA operations, the best solutions of AEA processors are transferred to the neighboring processors. For parallel computing, a PC cluster system consisting of 8 PCs was developed. Each PC employs the 2 GHz Pentium IV CPU and is connected with others through switch based fast Ethernet. To show the validity of the proposed method, the developed algorithm has been tested with a practical distribution system in Korea. From the simulation results, the proposed method found the optimal service restoration strategy. The obtained results were the same as that of the explicit exhaustive search method. Also, it is found that the proposed algorithm is efficient and robust for service restoration of distribution systems in terms of solution quality, speedup, efficiency, and computation time.

Distribution System Reconfiguration Using the PC Cluster based Parallel Adaptive Evolutionary Algorithm

  • Mun Kyeong-Jun;Lee Hwa-Seok;Park June Ho;Hwang Gi-Hyun;Yoon Yoo-Soo
    • KIEE International Transactions on Power Engineering
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    • v.5A no.3
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    • pp.269-279
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    • 2005
  • This paper presents an application of the parallel Adaptive Evolutionary Algorithm (AEA) to search an optimal solution of a reconfiguration in distribution systems. The aim of the reconfiguration is to determine the appropriate switch position to be opened for loss minimization in radial distribution systems, which is a discrete optimization problem. This problem has many constraints and it is very difficult to find the optimal switch position because of its numerous local minima. In this investigation, a parallel AEA was developed for the reconfiguration of the distribution system. In parallel AEA, a genetic algorithm (GA) and an evolution strategy (ES) in an adaptive manner are used in order to combine the merits of two different evolutionary algorithms: the global search capability of GA and the local search capability of ES. In the reproduction procedure, proportions of the population by GA and ES are adaptively modulated according to the fitness. After AEA operations, the best solutions of AEA processors are transferred to the neighboring processors. For parallel computing, a PC-cluster system consisting of 8 PCs·was developed. Each PC employs the 2 GHz Pentium IV CPU, and is connected with others through switch based fast Ethernet. The new developed algorithm has been tested and is compared to distribution systems in the reference paper to verify the usefulness of the proposed method. From the simulation results, it is found that the proposed algorithm is efficient and robust for distribution system reconfiguration in terms of the solution quality, speedup, efficiency, and computation time.

A Study on Hybrid Image Coder Using a Reconfigurable Multiprocessor System (Study II : Parallel Algorithm Implementation (재구성 가능한 다중 프로세서 시스템을 이용한 혼합 영상 부호화기 구현에 관한 연구(연구 II : 병렬 알고리즘 구현))

  • Choi, Sang-Hoon;Lee, Kwang-Kee;Kim, In;Lee, Yong-Kyun;Park, Kyu-Tae
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.30B no.10
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    • pp.13-26
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    • 1993
  • Motion picture algorithms are realized on the multiprocessor system presented in the Study I. For the most efficient processing of the algorithms, pipelining and geometrical parallel processing methods are employed, and processing time, communication load and efficiency of each algorithm are compared. The performance of the implemented system is compared and analysed with reference to MPEG coding algorithm. Theoretical calculations and experimental results both shows that geometrical partitioning is a more suitable parallel processing algorithm for moving picture coding having the advantage of easy algorithm modification and expansion, and the overall efficiency is higher than pipelining.

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Accelerating Fingerprint Enhancement Algorithm on GPGPU using OpenCL (OpenCL을 이용한 GPGPU 기반 지문개선 알고리즘 가속화)

  • Kim, Daehee;Park, Neungsoo
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.65 no.4
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    • pp.666-672
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    • 2016
  • Recently the fingerprint is widely used as one of biometrics to improve the security of financial mobile applications, because of its user convenience and high recognition rate. However, in order to apply fingerprint algorithms to finance and security applications, the recognition rate and processing speed of the fingerprint algorithms have to be improved further. In this paper, we propose the parallel fingerprint enhancement algorithm on general-purpose computing on graphics processing unit (GPGPU) using OpenCL. We discuss the analysis of the parallelism in the fingerprint algorithm as well as the exploration of optimization parameters of the parallel fingerprint algorithm to improve the performance. The experimental results showed that the execution of parallel fingerprint enhancement algorithm on GPGPUs was accelerated from 29.4 upto 69.2 times compared with the execution of the original one on the host CPUs.

Discrete Cosine Transform Algorithms for the VLSI Parallel Implementation (VLSI 병렬 연산을 위한 여현 변환 알고리듬)

  • 조남익;이상욱
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.25 no.7
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    • pp.851-858
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    • 1988
  • In this paper, we propose two different VLSI architectures for the parallel computation of DCT (discrete cosine transform) algorithm. First, it is shown that the DCT algorithm can be implemented on the existing systolic architecture for the DFT(discrete fourier transform) by introducing some modification. Secondly, a new prime factor DCT algorithm based on the prime factor DFT algorithm is proposed. And it is shown that the proposed algorihtm can be implemented in parallel on the systolic architecture for the prime factor DFT. However, proposed algorithm is only applicable to the data length which can be decomposed into relatively prime and odd numbers. It is also found that the proposed systolic architecture requires less multipliers than the structures implementing FDCT(fast DCT) algorithms directly.

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A Parallel Algorithm For Rectilinear Steiner Tree Using Associative Processor (연합 처리기를 이용한 직교선형 스타이너 트리의 병렬 알고리즘)

  • Taegeun Park
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.32B no.8
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    • pp.1057-1063
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    • 1995
  • This paper describes an approach for constucting a Rectilinear Steiner Tree (RST) derivable from a Minimum Spanning Tree (MST), using Associative Processor (AP). We propose a fast parallel algorithm using AP's basic algorithms which can be realized by the processing capability of rudimentary logic and the selective matching capability of Content- Addressable Memory (CAM). The main idea behind the proposed algorithm is to maximize the overlaps between the consecutive edges in MST, thus minimizing the cost of a RST. An efficient parallel linear algorithm with O(n) complexity to construct a RST is proposed using an algorithm to find a MST, where n is the number of nodes. A node insertion method is introduced to allow the Z-type layout. The routing process which only depends on the neighbor edges and the no-rerouting strategy both help to speed up finding a RST.

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Efficient Detection of Space-Time Block Codes Based on Parallel Detection

  • Kim, Jeong-Chang;Cheun, Kyung-Whoon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.2A
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    • pp.100-107
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    • 2011
  • Algorithms based on the QR decomposition of the equivalent space-time channel matrix have been proved useful in the detection of V-BLAST systems. Especially, the parallel detection (PD) algorithm offers ML approaching performance up to 4 transmit antennas with reasonable complexity. We show that when directly applied to STBCs, the PD algorithm may suffer a rather significant SNR degradation over ML detection, especially at high SNRs. However, simply extending the PD algorithm to allow p ${\geq}$ 2 candidate layers, i.e. p-PD, regains almost all the loss but only at a significant increase in complexity. Here, we propose a simplification to the p-PD algorithm specific to STBCs without a corresponding sacrifice in performance. The proposed algorithm results in significant complexity reductions for moderate to high order modulations.

Parallel Genetic Algorithm for Structural Optimization on a Cluster of Personal Computers (구조최적화를 위한 병렬유전자 알고리즘)

  • 이준호;박효선
    • Proceedings of the Computational Structural Engineering Institute Conference
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    • 2000.10a
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    • pp.40-47
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    • 2000
  • One of the drawbacks of GA-based structural optimization is that the fitness evaluation of a population of hundreds of individuals requiring hundreds of structural analyses at each CA generation is computational too expensive. Therefore, a parallel genetic algorithm is developed for structural optimization on a cluster of personal computers in this paper. Based on the parallel genetic algorithm, a population at every generation is partitioned into a number of sub-populations equal to the number of slave computers. Parallelism is exploited at sub-population level by allocationg each sub-population to a slave computer. Thus, fitness of a population at each generation can be concurrently evaluated on a cluster of personal computers. For implementation of the algorithm a virtual distributed computing system in a collection of personal computers connected via a 100 Mb/s Ethernet LAN. The algorithm is applied to the minimum weight design of a steel structure. The results show that the computational time requied for serial GA-based structural optimization process is drastically reduced.

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The Efficient Method of Parallel Genetic Algorithm using MapReduce of Big Data (빅 데이터의 MapReduce를 이용한 효율적인 병렬 유전자 알고리즘 기법)

  • Hong, Sung-Sam;Han, Myung-Mook
    • Journal of the Korean Institute of Intelligent Systems
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    • v.23 no.5
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    • pp.385-391
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    • 2013
  • Big Data is data of big size which is not processed, collected, stored, searched, analyzed by the existing database management system. The parallel genetic algorithm using the Hadoop for BigData technology is easily realized by implementing GA(Genetic Algorithm) using MapReduce in the Hadoop Distribution System. The previous study that the genetic algorithm using MapReduce is proposed suitable transforming for the GA by MapReduce. However, they did not show good performance because of frequently occurring data input and output. In this paper, we proposed the MRPGA(MapReduce Parallel Genetic Algorithm) using improvement Map and Reduce process and the parallel processing characteristic of MapReduce. The optimal solution can be found by using the topology, migration of parallel genetic algorithm and local search algorithm. The convergence speed of the proposal method is 1.5 times faster than that of the existing MapReduce SGA, and is the optimal solution can be found quickly by the number of sub-generation iteration. In addition, the MRPGA is able to improve the processing and analysis performance of Big Data technology.

Privacy-Preserving Parallel Range Query Processing Algorithm Based on Data Filtering in Cloud Computing (클라우드 컴퓨팅에서 프라이버시 보호를 지원하는 데이터 필터링 기반 병렬 영역 질의 처리 알고리즘)

  • Kim, Hyeong Jin;Chang, Jae-Woo
    • KIPS Transactions on Computer and Communication Systems
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    • v.10 no.9
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    • pp.243-250
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    • 2021
  • Recently, with the development of cloud computing, interest in database outsourcing is increasing. However, when the database is outsourced, there is a problem in that the information of the data owner is exposed to internal and external attackers. Therefore, in this paper, we propose a parallel range query processing algorithm that supports privacy protection. The proposed algorithm uses the Paillier encryption system to support data protection, query protection, and access pattern protection. To reduce the operation cost of a checking protocol (SRO) for overlapping regions in the existing algorithm, the efficiency of the SRO protocol is improved through a garbled circuit. The proposed parallel range query processing algorithm is largely composed of two steps. It consists of a parallel kd-tree search step that searches the kd-tree in parallel and safely extracts the data of the leaf node including the query, and a parallel data search step through multiple threads for retrieving the data included in the query area. On the other hand, the proposed algorithm provides high query processing performance through parallelization of secure protocols and index search. We show that the performance of the proposed parallel range query processing algorithm increases in proportion to the number of threads and the proposed algorithm shows performance improvement by about 5 times compared with the existing algorithm.