• ETRI Journal
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• v.26 no.6
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• pp.520-534
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• 2004

As the density of memories increases, unwanted interference between cells and the coupling noise between bit-lines become significant, requiring parallel testing. Testing high-density memories for a high degree of fault coverage requires either a relatively large number of test vectors or a significant amount of additional test circuitry. This paper proposes a new tiling method and an efficient built-in self-test (BIST) algorithm for neighborhood pattern-sensitive faults (NPSFs) and new neighborhood bit-line sensitive faults (NBLSFs). Instead of the conventional five-cell and nine-cell physical neighborhood layouts to test memory cells, a four-cell layout is utilized. This four-cell layout needs smaller test vectors, provides easier hardware implementation, and is more appropriate for both NPSFs and NBLSFs detection. A CMOS column decoder and the parallel comparator proposed by P. Mazumder are modified to implement the test procedure. Consequently, these reduce the number of transistors used for a BIST circuit. Also, we present algorithm properties such as the capability to detect stuck-at faults, transition faults, conventional pattern-sensitive faults, and neighborhood bit-line sensitive faults.

• The Journal of Korean Physical Therapy
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• v.19 no.6
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• pp.11-15
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• 2007

Purpose: This study examined the various patterns of standing to squatting activities, and reports the testing standard and phases for examining the standing to squatting position. Methods: One thousand, normal college students (500 males, 500 females) volunteered for this study. The patterns are performed by naked eye analysis with two video cameras. Results: The patterns from the standing to squatting position are as follows 1. parallel with the heel on the pattern: 2. parallel with the heel off the pattern: 3. closed with the heel on the pattern: 4. closed with the heel on the pattern: 5. open with the heel on the patternand 6. open with the heel on the pattern. Conclusion: The phases of the standing to squatting position are as follows: phase I from standing to the anterior parts of the knees reaching the anterior limit of the BOS, phase II from phase I until the height of the hip and knee joints are the same, phase III from phase II until there was no full squatting and the heels broke contact with the floor and phase IV from phase III full squatting on the heels in contact with the floor.

• Structural Engineering and Mechanics
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• v.38 no.6
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• pp.803-823
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• 2011

In this paper, the three dimensional Parallel Realistic Failure Process Analysis ($RFPA^{3D}$-Parallel) code based on micromechanical model is employed to investigate the bonding behavior in FRP sheet bonded to concrete in single shear test. In the model, the heterogeneity of brittle disordered material at a meso-scale was taken into consideration in order to realistically demonstrate the mechanical characteristics of FRP-to-concrete. Modified Mohr-coulomb strength criterion with tension cut-off, where a stressed element can damage in shear or in tension, was adopted and a stiffness degradation approach was used to simulate the initiation, propagation and growth of microcracks in the model. In addition, a Master-Slave parallel operation control technique was adopted to implement the parallel computation of a large numerical model. Parallel computational results of debonding of FRP-concrete visually reproduce the spatial and temporal debonding failure progression of microcracks in FRP sheet bonded to concrete, which agrees well with the existing testing results in laboratory. The numerical approach in this study provides a useful tool for enhancing our understanding of cracking and debonding failure process and mechanism of FRP-concrete and our ability to predict mechanical performance and reliability of these FRP sheet bonded to concrete structures.

• Proceedings of the KSME Conference
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• 2008.11a
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• pp.735-738
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• 2008

A 6 D.O.F Stewart platform type parallel robot has been developed as a simulator to test the surveillance robot stabilization control. Since the surveillance robot is installed on the unmanned ground vehicle (UGV), it is required to have a stabilization control system to compensate the disturbance from the UGV. PID control scheme has been applied to the parallel robot to generate controlled motion following the input motion.

• The KIPS Transactions:PartA
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• v.8A no.2
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• pp.125-132
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• 2001

IBM developed the MPI-IO, we call it MPI-2, on the General Parallel File System. We designed and implemented various Matrix Multiplication Benchmarks to evaluate its performances. The MPI-IO on the General Parallel File System shows four kinds of data access methods : the non-collective and blocking, the collective and blocking, the non-collective and non-blocking, and the split collective operation. In this paper, we propose benchmarks to measure the IO time and the computation time for the data access methods. We describe not only its implementation but also the performance evaluation results.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.6
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• pp.44-50
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• 1997

This paper describes the design and test of an on-line non-invasive network performance monitor (hardware portion) for the SPAX parallel computer. The SPAX parallel computer supports up to 256 intel P6 processors with 4 P6 processors constituting a processign node. The nodes are interconnected with a dual two-level crossbar network calle dXcent-net. Since the performance of the SPAX parallel computer is highly dependent on the proper and efficient operation of the network, an on-line non-invasive network performance monitor (with hardware components) has been developed to aid in the monitoring and tunign of the Xcent-net. Successful testing of a prototype node monitor board and PC interface system shows that our monitor design provides a low-cost practical solution to this problem.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.10 s.352
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• pp.140-150
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• 2006

In this paper, we present a new hardware architecture for testing various cores embedded in SoC. The conventional solutions need much testing time since only one core is tested at single test period. To enhance this, S-TAM, a novel test architecture, and its controller which enable parallel testing of various cores are proposed. S-TAM supports bus sharing to broadcast testing and cores to be tested are selected by using it. In addition, S-TAM controller enables the effective SoC test by simultaneous controlling the various test cores which are based on the different test architectures like IEEE 1149.1 and IEEE 1500.

• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 1996.03a
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• pp.85-90
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• 1996

In the word, there is varied types of vibration, and these affect the mechanical industry. In this paper is plates with two parallel sides fixed. Electronic speckle pattern interferometry (ESPI) is one of the optical nondestructive testing technique. By using the ESPI, vibration modes for excitation point, a/b(ratio of longuitudinal and lateral length), and kind of specimen are measured and compared qualitatively with theoritical analysis that Warburton proposed.

• Journal of Electrical Engineering and Technology
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• v.11 no.4
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• pp.839-847
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• 2016

Energy recovery battery testing systems (ERBTS) have been widely used in battery manufactures. All the ERBTS are connected in parallel which forms a special and complicated micro-grid system, which has the shortcomings of low energy recovery efficiency, complex grid-connected control algorithms issues for islanded detection, and complicated power circuit topology issues. To solve those shortcomings, a DC micro-grid system is proposed, the released testing energy has the priority to be reutilized between various testing system within the local grid, Compared to conventional scheme, the proposed system has the merits of a simplified power circuit topology, no needs for synchronous control, and much higher testing efficiency. The testing energy can be cycle-used inside the local micro-grid. The additional energy can be recovered to AC-grid. Numerous experimental comparison results between conventional and proposed scheme are provided to demonstrate the validity and effectiveness of the proposed technique.

• Journal of KIISE:Software and Applications
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• v.27 no.2
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• pp.108-119
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• 2000

Most of prior works on testing parallel programs have concentrated on how to guarantee the reproducibility by employing event traces exercised during executions of a program. Consequently, little work has been done to generate meaningful event sequences, especially, from specifications. This paper describes techniques for deriving event sequences from Message Sequence Charts(MSCs) which are widely used in telecommunication areas for its simplicity in specifying the behaviors of a program. For deriving event sequences from MSCs, we have to uncover the causality relations among events embedded implicitly in MSCs. In order to attain this goal, we adapt vector time stamping which has been previously used to determine the ordering of events taken place during an execution of interacting processes. Then, valid event sequences, satisfying the causality relations, are generated according to the interleaving rules suggested in this paper. The feasibility of our testing technique was investigated using the phone conversation example. In addition, we discussed on the experimental results gained from the example and how to combine various test criteria into our testing environment.