• 제목/요약/키워드: Parallel Simulator

검색결과 158건 처리시간 0.03초

Appropriate Synchronization Time Allocation for Distributed Heterogeneous Parallel Computing Systems

  • Nidaw, Biruk Yirga;Oh, Myeong-Hoon;Kim, Young Woo
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제13권11호
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    • pp.5446-5463
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    • 2019
  • Parallel computing system components should be harmonized, and this harmonization is kept existent using synchronization time. Synchronization time affects the system in two ways. First, if we have too little synchronization time, some tasks face the problem of harmonization, as they need appropriate time to update and synchronize with the system. Second, if we allocate a large amount of time, stall system created. Random allocation of synchronization time for parallel systems slows down not only the booting time of the system but also the execution time of each application involved in the system. This paper presents a simulator used to test and allocate appropriate synchronization time for distributed and parallel heterogeneous systems. The simulator creates the parallel and heterogeneous system to be evaluated, and lets the user vary the synchronization time to optimize the booting time. NS3-cGEM5 simulator in this paper is formed by HLA-RTI federation integration of the two independent architecture and network simulators - NS3 and cGEM5. Therefore, nodes created on these simulators need synchronizations for harmonized system performance. We tested and allocated the appropriate synchronization time for our sample parallel system composed of one x86 server and three ARM clients.

Development of 3 D.O.F parallel robot's simulator for education

  • Yoo, Jae-Myung;Kim, John-Hyeong;Park, Dong-Jin
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2005년도 ICCAS
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    • pp.2290-2295
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    • 2005
  • In this paper, it is developed simulator system of 3 D.O.F parallel robot for educate of expertness. This simulator system is composed of three parts ? 3 D.O.F parallel robot, controller (hardware) and software. First, basic structure of the robot is 3 active rotary actuator that small geared step motor with fixed base. An input-link is connected to this actuator, and this input-link can connect two ball joints. Thus, two couplers can be connected to the input-link as a pair. An end-plate, which is jointed by a ball joint, can be connected to the opposite side of the coupler. A sub-link is produced and installed to the internal spring, and then this sub-link is connected to the upper and bottom side of the coupler in order to prevent a certain bending or deformation of the two couplers. The robot has the maximum diameter of 230 mm, 10 kg of weight (include the table), and maximum height of 300 mm. Hardware for control of the robot is composed of computer, micro controller, pulse generator, and motor driver. The PC used in the controller sends commands to the controller, and transform signals input by the user to the coordinate value of the robot by substituting it into equations of kinematics and inverse kinematics. A controller transfer the coordinate value calculated in the PC to a pulse generator by transforming it into signals. A pulse generator analyzes commands, which include the information received from the micro controller. A motor driver transfer the pulse received from the pulse generator to a step motor, and protects against the over-load of the motor Finally, software is a learning purposed control program, which presents the principle of a robot operation and actual implementation. The benefit of this program is that easy for a novice to use. Developed robot simulator system can be practically applied to understand the principle of parallel mechanism, motors, sensor, and various other parts.

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휴대용 유도탄 체계의 모델링과 성능분석을 위한 실시간 병렬처리 시뮬레이터 (Real-time Parallel Processing Simulator for Modeling Portable Missile System and Performance Analysis)

  • 김병문;정순기
    • 한국컴퓨터정보학회논문지
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    • 제11권4호
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    • pp.35-45
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    • 2006
  • 본 논문에서는 휴대용 회전 유도탄 체계의 모델링과 성능분석에 사용할 수 있는 실시간 병렬처리 시뮬레이터 개발에 대하여 기술한다. 실시간 병렬처리 시뮬레이터는 항공기의 적외선 형상을 만드는 탐색기 에뮬레이터, 실시간 컴퓨터, 시스템 유닛. 유도 조종 장치 및 탐색기 프로세서 등과 같은 하드웨어 실물장치와 실시간 컴퓨터에 내장된 수학적 모델, 6 자유도 모델 및 공력 모델 등을 구현한 응용 소프트웨어 및 호스트 컴퓨터에 내장된 사용자 프로그램 등으로 구성되었다. 실시간 컴퓨터는 병렬로 연결된 여섯 개의 TI사 C-40 프로세서로 설계되었으며, 기계적 장치와 결합된 아날로그 전자회로를 이용하여 탐색기 에뮬레이터를 설계하였다. 시스템 유닛은 구성 요소간의 임피던스 정합 기능과 미세 신호를 처리하며, 시뮬레이터와 실물 유도탄 발사 장치의 연결이 가능하다. 개발된 실시간 병렬처리 시뮬레이터를 휴대용 회전 유도탄의 성능분석 장치로 사용하기 위하여 현장실험을 통한 결과 검증시험을 수행하였다.

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병렬기구형 틸팅 테이블의 개발에 관한 연구 (Study on Development of Parallel-Typed Tilting Table)

  • 이원철;김태성;박근우;이민기
    • 대한기계학회:학술대회논문집
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    • 대한기계학회 2001년도 추계학술대회논문집A
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    • pp.734-739
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    • 2001
  • In this paper, we develop a six-axes machining center tool(MCT) and CAD/CAM system. The MCT consists of two mechanical parts, i.e., a X-Y-Z Cartesian coordinate typed MCT and a parallel-typed tilting table. Kinematics and singularity are accomplished to design the parallel-typed tilting table, and CAD/CAM system is developed for the six-axes MCT, which requires the commands of position as well as orientation for machining of complex shape. The CAD/CAM system has a tool path generator, a NC code generator and a graphic simulator. This paper designs the parallel-typed tilting table to meet the desired specification and presents the results of tool path, NC code and graphic simulation.

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역기구학을 이용한 케이싱 오실레이터의 자코비안 해석 (Jacobian Analysis of Casing Oscillator Using the Inverse Kinematics)

  • 배형섭;백재호;이은준;박명관
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2002년도 추계학술대회 논문집
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    • pp.576-579
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    • 2002
  • This paper presents the jacobian analysis of new type Casing Oscillator using the inverse kinematics, and to search for it's singularities through the jacobian analysis. All parallel manipulator have some singularities in workspace or it's outside workspace. Singularities were cleared by many other study of parallel manipulator f3r that reason recent publication of device control. In this paper defined that singularities of new file of Casing Oscillator and, to show it's graph. Finally this paper will be used for a practical example for construction spot, aviation simulator, vehicles simulator, military equipment etc.

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Bounded-wave EMP Simulator 안테나의 설계 (Design of a Bounded-wave EMP Simulator Antenna)

  • 선다영;최학근;임성빈;장재웅;김태윤;최근경
    • 한국인터넷방송통신학회논문지
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    • 제11권5호
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    • pp.87-93
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    • 2011
  • 근래에 EMP(electromagnetic pulse)의 위협이 증가하면서 이에 대한 방호 대책과 관련하여 전자파 보안 기술 개발의 필요성이 대두되고 있다. 그러나 해외에 비해 국내에서는 이에 관한 연구가 미진한 실정이다. 본 논문에서는 EMP에 대한 전자파 보안 기술 개발을 목적으로 EUT(equipment under test)의 EMP 내성을 시험할 수 있는 bounded-wave EMP simulator의 기본 형태인 평행판 simulator(parallel-plate simulator: PPS) 안테나를 설계하였다. 설계된 EMP simulator 안테나는 웨이브 런처, 전송 선로, 종단 테이퍼로 나누어 설계되었으며, 워킹 볼륨 내에서 가로, 세로, 높이가 30 cm 이내인 물체의 시험에 필요한 영역에 TEM 모드가 우세한 필드를 형성하여 EMP simulator로써 사용 가능할 것으로 보인다.

진동 환경 재현 6-자유도 가진기 개발 진척도 (Progress in Developing the 6-DOF Vibration Environmental Simulator)

  • 정완섭;우춘규;김수현;윤각진
    • 한국소음진동공학회:학술대회논문집
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    • 한국소음진동공학회 1998년도 춘계학술대회논문집; 용평리조트 타워콘도, 21-22 May 1998
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    • pp.296-301
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    • 1998
  • In this experiments of design, vibration evaluation, and test of vehicles, aircraft, and other mechanisms the development of vibration simulator that serves environment similar to real fields takes lots of advantages. Especially, in the real field test of vehicles it possesses the advantages of showing the dynamic characteristics of the vehicle. In this study, to investigate the validity and fitness of proposed 6DOF parallel link mechanism we simulated that mechanism.

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병렬 파이프라인 프로세서 아키덱처의 설계 (Design of a Parallel Pipelined Processor Architecture)

  • 이상정;김광준
    • 전자공학회논문지B
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    • 제32B권3호
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    • pp.11-23
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    • 1995
  • In this paper, a parallel pipelined processor model which acts as a small VLIW processor architecture and a scheduling algorithm for extracting instruction-level parallelism on this architecture are proposed. The proposed model has a dual-instruction mode which has maximum 4 basic operations being executed in parallel. By combining these basic operations, variable instruction set can be designed for various applications. The scheduling algorithm schedules basic operations for parallel execution and removes pipeline hazards by examining data dependency and resource conflict relations. In order to examine operation and evaluate the performance,a C compiler and a simulator are developed. By simulating various test programs with the compiler and the simulator, the characteristics and the performance result of the proposed architecture are measured.

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