• Proceedings of the Korea Institute of Convergence Signal Processing
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• 2001.06a
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• pp.97-100
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• 2001

This paper introduces that it minimizes interference between links at high speed trajectory tracking of 2-degree parallel link robot. And in spite of system uncertainty, it introduces controller design method which is satisfied with performance specification. To do these, we separate two channels from parallel link robot through ICD(Individual Channel Design) and design controller of each channel using QFT(Quantitative Feedback Theory). Finally, we make sure of robustness and excellence of QFT control1er through simulation and experiment.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.31B no.6
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• pp.10-16
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• 1994

In case of off-line character recognition with statistical method, the character recognition speed for Korean or Chinese characters is slow since the amount of calculation is huge. To improve this problem, we seperate the recognition steps into several functional stages and implement them with hardwares for each stage so that all the stages can be processed with pipline structure. In accordance with temporal parallel processing, a high speed character recognition system can be implemented. In this paper, we implement a classification hardware, which is one of the several functional stages, to improve the speed by parallel structure with multiple DSPs(Digital Signal Processors). Also, it is designed to be able to expand DSP boards in parallel to make processing faster as much as we wish. We implement the hardware as an add-on board in IBM-PC, and the result of experiment is that it can process about 47-times and 71-times faster with 2 DSPs and 3 DSPs respectively than the IBM-PC(486D$\times$2-66MHz). The effectiveness is proved by developing a high speed OCR(Optical Character Recognizer).

• The Transactions of The Korean Institute of Electrical Engineers
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• v.66 no.6
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• pp.955-961
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• 2017

In this paper, we propose a parallel approximate string matching algorithm with k-mismatches for multiple fixed-length patterns (PMASM) in DNA sequences. PMASM is developed from parallel single pattern approximate string matching algorithms to effectively calculate the Hamming distances for multiple patterns with a fixed-length. In the preprocessing phase of PMASM, all target patterns are binary encoded and stored into a look-up memory. With each input character from the input string, the Hamming distances between a substring and all patterns can be updated at the same time based on the binary encoding information in the look-up memory. Moreover, PMASM adopts graphics processing units (GPUs) to process the data computations in parallel. This paper presents three kinds of PMASM implementation methods in GPUs: thread PMASM, block-thread PMASM, and shared-mem PMASM methods. The shared-mem PMASM method gives an example to effectively make use of the GPU parallel capacity. Moreover, it also exploits special features of the CUDA (Compute Unified Device Architecture) memory structure to optimize the performance. In the experiments with DNA sequences, the proposed PMASM on GPU is 385, 77, and 64 times faster than the traditional naive algorithm, the shift-add algorithm and the single thread PMASM implementation on CPU. With the same NVIDIA GPU model, the performance of the proposed approach is enhanced up to 44% and 21%, compared with the naive, and the shift-add algorithms.

• Journal of applied mathematics & informatics
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• v.3 no.2
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• pp.157-168
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• 1996

This paper describes an efficient coding method for Ko-rean characters (alphabet) using a three-state transition graph. Par-allel hangul Dynamic Coding Method (PHDCM) compresses about 3.5 bits per Korean character compared with other coding techinques. When we ran the method on a MasPar machine it achieved a 49.314-fold speedup with 64 processors having 10 million orean characters

• Journal of Broadcast Engineering
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• v.18 no.6
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• pp.816-822
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• 2013

The latest video coding standard HEVC was developed by the joint work of JCT-VC(Joint Collaborative Team on Video Coding) from ITU-T VCEG and ISO/IEC MPEG. The HEVC standard reduces the BD-Bitrate of about 50% compared with the H.264/AVC standard. However, using the various methods for obtaining the coding gains has increased complexity problems. The proposed method reduces the complexity of HEVC by using both CPU parallel processing and GPU-accelerated processing. The experiment result for UHD($3840{\times}2144$) video sequences achieves 15fps encoding/decoding performance by applying the proposed method. Sooner or later, we expect that the H/W speedup of data transfer rates between CPU and GPU will result in reducing the encoding/decoding times much more.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.10
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• pp.37-44
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• 1999

This paper report the implementation results of Monte Carlo numerical calculation for ion distributions in plasma dry etching chamber and of the surface evolution simulator using cell removal method for topographical evolution of the surface exposed to etching ion. The energy and angular distributions of ion across the plasma sheath were calculated by MC(Monte Carlo) algorithm. High performance MPP(Massively Parallel Processing) algorithm developed in this paper enables efficient parallel and distributed simulation with an efficiency of more than 95% and speedup of 16 with 16 processors. Parallelization of surface evolution simulator based on cell removal method reduces simulation time dramatically to 15 minutes and increases capability of simulation required enormous memory size of 600Mb.

• Journal of Korea Multimedia Society
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• v.10 no.8
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• pp.945-957
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• 2007

Quantitative association rules apply a binary association to the data which have the relatively strong quantitative attributions in a large database system. When a domain range of quantitative data which involve the significant meanings for the association is too broad, a domain requires to be divided into a proper interval which satisfies the minimum support for the generation of large interval items. The reliability of formulated rules is enormously influenced by the generation of large interval items. Therefore, this paper proposes a new method to efficiently generate the large interval items. The proposed method does not lose any meaningful intervals compared to other existing methods, provides the accurate large interval items which are close to the minimum support, and minimizes the loss of characteristics of data. In addition, since our method merges data where the frequency of data is high enough, it provides the fast run time compared with other methods for the broad quantitative domain. To verify the superiority of proposed method, the real national census data are used for the performance analysis and a Clunix HPC system is used for the parallel processing.

• Journal of Digital Convergence
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• v.12 no.11
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• pp.379-386
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• 2014

In this paper, the processing speed of Grabcut algorithm in order to efficiently improve the GPU (Graphics Processing Unit) for processing the data from the method. Grabcut algorithm has excellent performance object detection algorithm. Grabcut existing algorithms to split the foreground area and the background area, and then background and foreground K-cluster is assigned a cluster. And assigned to gradually improve the results, until the process is repeated. But Drawback of Grabcut algorithm is the time consumption caused by the repetition of clustering. Thus GPGPU (General-Purpose computing on Graphics Processing Unit) using the repeated operations in parallel by processing Grabcut algorithm to effectively improve the processing speed of the method. We proposed method of execution time of the algorithm reduced the average of about 95.58%.

• Journal of the Korea Society of Computer and Information
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• v.27 no.4
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• pp.1-8
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• 2022

In this paper, we propose a more effective unique identifier allocation method for macro expansion in a single-process multicore parallel computing environment that does not require locks. Our key idea for such an allocation method is to remove sequential dependencies using the remainder operation. We confirmed that our lock-free method is suitable for improving the performance of parallel macro expansion through the following benchmark: we patched an existing library, which is based on a sequential unique identifier allocation, with our proposed method, and compared the performances of the same program but using two different versions of the library, before and after the patch.

• Journal of the Korean Society for Precision Engineering
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• v.22 no.1
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• pp.122-129
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• 2005

On the cluster system, the parallel code of rigid-plastic FEM has been developed. The cluster system, Simforge, has 15 processors and the total memory is 4.5GBytes. In the developed parallel code, the distributed data of the column-wise partitioned stiffness are stored as the compressed row storage and the diagonal preconditioned conjugate gradient solver is applied. The analysis of block upsetting is performed with the parallel code on Simforge cluster system. In this paper, the analysis results are compared and discussed.