• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.359-359
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• 2010

IGBT(Insulated Gate Bipolar Transistor) 란 MOS(Metal Oxide Silicon) 와 Bipolar 기술의 결정체로 낮은 순방향 손실(Low Saturation)과 빠른 Speed를 특징으로 기존의 Thyristor, BJT, MOSFET 등으로 실현 불가능한 분양의 응용처를 대상으로 적용이 확대 되고 있고, 300V 이상의 High Power Application 영역에서 널리 사용되고 있는 고효율, 고속의 전력 시스템에 있어서 필수적으로 이용되는 Power Device이다. IGBT는 출력 특성 면에서 Bipolar Transistor 이상의 전류 능력을 가지고 있고 입력 특성 면에서 MOSFET과 같이 Gate 구동 특성을 갖기 때문에 High Switching, High Power에 적용이 가능한 소자이다. 반면에, Conventional IGBT는 MOSFET과 달리 IGBT 내부에 Anti-Parallel Diode가 없기 때문에 Inductive Load Application 적용시에는 별도의 Free Wheeling Diode가 필요하다. 그래서, 본 논문에서 별도의 Anti-Parallel Diode의 추가 없이도 Inductive Load Application에 적용 가능한 RC IGBT를 적용하여 600V/15A급 Three Phase Inverter Module을 제안 하고자 한다.

• 한국신재생에너지학회:학술대회논문집
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• 한국신재생에너지학회 2007년도 추계학술대회 논문집
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• pp.336-340
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• 2007

본 논문에서는 750kW 풍력발전용 인버터를 개발한 결과와 2년 동안의 현장실증을 통하여 얻어진 경험을 바탕으로 2MW 영구자석형 동기발전기(RMSG, Permanent Magnet Synchronous Generator)의 전력변환을 위한 병렬형 인버터의 시뮬레이션과 이를 통한 설계와 제작 및 기본시험 과정을 소개하고자 한다.

• The Transactions of the Korean Institute of Electrical Engineers D
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• 제49권4호
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• pp.175-182
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• 2000

The back-light inverter used in the laptop computer is designed in this paper. It has been difficult for electromagnetic transformer to enhance the efficiency and compact profile of the inverter. In this paper, (1) the piezoelectric transformer (PT) is used for reducing the loss; (2) the volumes of core and winding coil are used in electromagnetic transformer, and (3) the half-bridge series parallel resonant circuit is used in the driver of the inverter. The modified PT for this paper and the equivalent circuit are supported by the simulation program. The result of the experiment shows more than 91% improvement in terms of the efficiency.

• Proceedings of the KIEE Conference
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• 대한전기학회 1996년도 추계학술대회 논문집 학회본부
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• pp.350-352
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• 1996

A Hight Efficiency Quasi-Parallel Resonant DC-Link Inverter which shows highly improved PWM capability, low loss characteristic and low voltage stress is presented. A method to minimize freewheeling interval, which is able to largely decrease DC-link operation losses and to steadily guarantee soft switching in the wide operation region is proposed. Analysis and simple experiments were performed to verify validity of the proposed inverter topology.

• Journal of Electrical Engineering and Technology
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• 제13권3호
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• pp.1251-1264
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• 2018

The systematic and effective design method of a Class-D current-source resonant inverter for use in an induction cooker with zero-ripple line current is presented. The design procedure is based on the principle of the Class-D current-source resonant inverter with a simplified load network model that is a parallel equivalent circuit. An induction load characterization is obtained from a large-signal excitation test-bench based on parallel load network, which is the key to an accurate design for the induction cooker system. Accordingly, the proposed scheme provides a systematic, precise, and feasible solution than the existing design method based on series-parallel load network under low-signal excitation. Moreover, a zero-ripple condition of utility-line input current is naturally preserved without any extra circuit or control. Meanwhile, a differential-mode input electromagnetic interference (EMI) filter can be eliminated, high power quality in utility-line can be obtained, and a standard-recovery diode of bridge-rectifier can be employed. The step-by-step design procedure explained with design example. The devices stress and power loss analysis of induction cooker with a parallel load network under large-signal excitation are described. A 2,500-W laboratory prototype was developed for $220-V_{rms}/50-Hz$ utility-line to verify the theoretical analysis. An efficiency of the prototype is 96% at full load.

• The Transactions of the Korean Institute of Power Electronics
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• 제21권4호
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• pp.283-289
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• 2016

Islanding protection of a grid-connected photovoltaic (PV) inverter is a key function for standards compliance. Unintentional islanding results in safety hazards, reliability, and many other issues. Therefore, many anti-islanding schemes have been examined. However, existing anti-islanding schemes have poor power quality and non-detection zone issues. Moreover, most schemes have problems that deteriorate the performance of islanding detection under parallel operation. Therefore, this paper proposes a novel anti-islanding scheme that has negligible power quality degradation and has no non-detection zone and islanding detection under a parallel operation. Both simulation and experimental results validate the proposed scheme.

• Proceedings of the KIEE Conference
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• 대한전기학회 1997년도 하계학술대회 논문집 F
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• pp.2234-2236
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• 1997

The SIT, a Static Induction Transistor, is a semiconductor switch that is also called the power junction field-effect transistor (power JFET). Its characteristics are similar to a MOSFET except that its power level is higher and its maximum frequency of operation is lower. The normal method to protect against internal circuit transients of the form of di/dt or dv/dt is the use of snubber circuits. However, the limits of di/dt and dv/dt are high enough for the SIT that it is possible to operate without snubber circuits. SITs can be connected in parallel in order to cope with higher load currents that the value of an individual device rating. The purpose of this study is to investigate the parallel operation of SITs. In this experiment, we used a half-bridge inverter, the output of inverter is up to almost 1MHz and 2kW. Experimental results show that the operation of parallel connected SITs are facilitated individually good current sharing. The reason is the positive temperature coefficient of resistance of the SIT.

• Journal of Electrical Engineering and Technology
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• 제10권3호
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• pp.1048-1057
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• 2015

This paper proposes a sensorless speed control algorithm for parallel-connected dual Surface-mounted Permanent Magnet Synchronous Motors (SPMSMs) fed by a single inverter. For stable parallel operation of synchronous motors with a single inverter, each motor has to be constantly kept in the synchronization state regardless of load torque. If the master motor with the larger load is controlled, the synchronous state will be maintained. Therefore, detection of the master motor is essential. Conventionally, the master motor is determined by comparing the rotor position error from the relation between the back-EMF for torque angle and the flux position; consequently, the position sensor is deemed essential for finding the rotor position. The parallel sensorless speed control method proposed in this paper uses no position sensor, instead it compares the flux-axis current from the connection between the back-EMF for torque angle and current in unbalanced load conditions. The results of simulation and experiment conducted verify the efficacy of the proposed method.

• Journal of Power Electronics
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• 제11권5호
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• pp.632-638
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• 2011

This paper presents a cascaded coil flux control based on a Current Source Parallel Resonant Push-Pull Inverter (CSPRPI) for Induction Heating (IH) applications. The most important problems associated with current source parallel resonant inverters are start-up problems and the variable response of IH systems under load variations. This paper proposes a simple cascaded control method to increase an IH system's robustness to load variations. The proposed IH has been analyzed in both the steady state and the transient state. Based on this method, the resonant frequency is tracked using Phase Locked Loop (PLL) circuits using a Multiplier Phase Detector (MPD) to achieve ZVS under the transient condition. A laboratory prototype was built with an operating frequency of 57-59 kHz and a rated power of 300 W. Simulation and experimental results verify the validity of the proposed power control method and the PLL dynamics.

• The Transactions of the Korean Institute of Power Electronics
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• 제18권6호
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• pp.515-522
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• 2013

In this paper, a new PCS is proposed which is consisted of high boost dual converter and single phase half-bridge inverter. The proposed PCS is configured in parallel input / serial output, using two interleaved voltage doubler converter. Converter of the proposed PCS is distribute input current by configuring parallel input and reduced turn ratio of transformer by configuring serial output. Also, compositions of the inverter are composed of serial output capacitor of converter and half-bridge inverter. The dual converter and single phase half-bridge inverter is designed and characteristic of the new PCS is analysed. The system of the 1.5[kW] PCS is verified through an experimental about operation and stability.