• Title/Summary/Keyword: Page fault

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Improving Lock Performance of Home-base Lazy Release Consistency (Home-based Lazy Release Consistency의 락 성능향상)

  • Yun, Hui-Cheol;Lee, Sang-Gwon;Lee, Jun-Won;Maeng, Seung-Ryeol
    • Journal of KIISE:Computer Systems and Theory
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    • v.28 no.10
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    • pp.513-519
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    • 2001
  • Home-based Lazy Release Consistency (HLRC) shows poor performance on lock based applications because of two reasons:(1) a whole page is fetched on a page fault while actual modification is much smaller , and(2) the home is at the fixed location while access pattern is migratory, In this paper we present an efficient lock protocol for HLRC. In this protocol, the pages that are expected to be used by acquirer selectively updated using diffs. The diff accumulation problem is minimized by limiting the size of diffs to be sent for each page. Our protocol reduces the number or page faults inside critical sections because pages can be updated by applying locally stored diffs . This reduction yields the reduction of average lock waiting time and the reduction of message amount. The experiment with five applications shows that our protocol archives 2%~40% speedup against base HLRC for four applications.

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Page-level Incremental Checkpointing for Efficient Use of Stable Storage (안정 저장장치의 효율적 사용을 위한 페이지 기반 점진적 검사점 기법)

  • Heo, Jun-Young;Yi, Sang-Ho;Gu, Bon-Cheol;Cho, Yoo-Kun;Hong, Ji-Man
    • Journal of KIISE:Computer Systems and Theory
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    • v.34 no.12
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    • pp.610-617
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    • 2007
  • Incremental checkpointing, which is intended to minimize checkpointing overhead, saves only the modified pages of a process. However, the cumulative site of incremental checkpoints increases at a steady rate over time because a number of updated values may be saved for the same page. In this paper, we present a comprehensive overview of Pickpt, a page-level incremental checkpointing facility. Pickpt provides space-efficient techniques aiming to minimizing the use of disk space. For our experiments, the results showed that the use of disk space using Pickpt was significantly reduced, compared with existing incremental checkpointing.

Delayed Dual Buffering: Reducing Page Fault Latency in Demand Paging for OneNAND Flash Memory (지연 이중 버퍼링: OneNAND 플래시를 이용한 페이지 반입 비용 절감 기법)

  • Joo, Yong-Soo;Park, Jae-Hyun;Chung, Sung-Woo;Chung, Eui-Young;Chang, Nae-Hyuck
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.3 s.357
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    • pp.43-51
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    • 2007
  • OneNAND flash combines the advantages of NAND and NOR flash, and has become an alternative to the former. But the advanced features of OneNAND flash are not utilized effectively in demand paging systems designed for NAND flash. We propose delayed dual buffering, a demand paging system which fully exploits the random-access I/O interface and dual page buffers of OneNAND flash demand paging system. It effectively reduces the time of page transfer from the OneNAND page buffer to the main memory. On average, it achieves and 28.5% reduction in execution time and 4.4% reduction in paging system energy consumption.

Taking Point Decision Mechanism of Page-level Incremental Checkpointing based on Cost Analysis of Process Execution Time (프로세스 수행 시간의 비용 분석에 기반을 둔 페이지 단위 점진적 검사점의 작성 시점 결정 기법)

  • Yi Sang-Ho;Heo Jun-Young;Hong Ji-Man
    • The KIPS Transactions:PartA
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    • v.13A no.4 s.101
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    • pp.289-294
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    • 2006
  • Checkpointing is an effective mechanism that allows a process to resume its execution that was discontinued by a system failure without having to restart from the beginning. Especially, page-level incremental checkpointing saves only the modified pages of a process to minimize the checkpointing overhead. This means that in incremental checkpointing, the time consumed for checkpointing varies according to the amount of modified pages. Thus, the efficient interval of checkpointing must be determined on run-time of the process. In this paper, we present an efficient and adaptive page-level incremental checkpointing facility that is based on the cost analysis of process execution time. In our simulation, results show that the proposed mechanism significantly reduced the average process execution time compared with existing fixed-interval-based page-level incremental checkpointing.

Implementation of a Software Streaming System Using Pagefault Interrupt Routine Hooking (페이지폴트 인터럽트 루틴 후킹을 이용한 소프트웨어 스트리밍 시스템 구현)

  • Kim, Han-Gook;Lee, Chang-Jo
    • Journal of Korea Society of Industrial Information Systems
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    • v.14 no.2
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    • pp.8-15
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    • 2009
  • The need for ASP(Application Service Provider) has evolved from the increasing costs of specialized software that have far exceeded the price rage of small to medium sized businesses. There are a lot of technologies that make ASP possible, and software streaming service is one of them Software streaming is a method for overlapping transmission and execution of stream-enabled software. The stream-enabled software is able to run on a device even while the transmission/streaming of the software may still be in progress. Thus, a user does not have to wait for the completion of the software's download prior to starting to execute the software. In this paper, we suggest the new concept of software streaming system implement using the PageFault Interrupt Routine Hooking. As it is able to efficiently manage application, we do not have to install the entire software. In addition, we can save hardware resources by using it because we load basic binaries without occupying the storage space of the hardware.

Efficient Process Checkpointing through Fine-Grained COW Management in New Memory based Systems (뉴메모리 기반 시스템에서 세밀한 COW 관리 기법을 통한 효율적 프로세스 체크포인팅 기법)

  • Park, Jay H.;Moon, Young Je;Noh, Sam H.
    • Journal of KIISE
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    • v.44 no.2
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    • pp.132-138
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    • 2017
  • We design and implement a process-based fault recovery system to increase the reliability of new memory based computer systems. A rollback point is made at every context switch to which a process can rollback to upon a fault. In this study, a clone process of the original process, which we refer to as a P-process (Persistent-process), is created as a rollback point. Such a design minimizes losses when a fault does occur. Specifically, first, execution loss can be minimized as rollback points are created only at context switches, which bounds the lost execution. Second, as we make use of the COW (Copy-On-Write)mechanism, only those parts of the process memory state that are modified (in page units) are copied decreasing the overhead for creating the P-process. Our experimental results show that the overhead is approximately 5% in 8 out of 11 PARSEC benchmark workloads when P-process is created at every context switch time. Even for workloads that result in considerable overhead, we show that this overhead can be reduced by increasing the P-process generation interval.

Improving Responsiveness of Android Smartphones via Premapping Mechanism (선사상 기법을 통한 안드로이드 스마트폰의 응답성 향상)

  • Kim, Jeongho;Huh, Sungju;Hong, Seongsoo
    • Proceedings of the Korean Society of Computer Information Conference
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    • 2013.01a
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    • pp.61-62
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    • 2013
  • 안드로이드 스마트폰 사용자에게 응답성은 중요한 성능 이슈이다. 스마트폰 응용 구동 시 응답성에 큰 영향을 미치는 것은 수많은 페이지 부재 처리기의 수행 시간이다. 선사상 기법은 페이지 부재 발생을 효과적으로 줄일 수 있는 기법이지만, 선사상할 페이지를 예측하기 어렵기 때문에 기존 안드로이드 스마트폰에서는 요구 사상 기법이 사용되고 있다. 본 논문은 응답성 향상을 위해 커널이 안드로이드 런타임과 라이브러리의 도움을 받아 선사상할 페이지를 예측하는 선사상 기법을 제안한다. 실험 결과 제안된 기법은 기존 시스템에 비해 웹 브라우저 응용의 응답 시간을 최대 3.25% 단축할 수 있었다.

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Design of the Compression Algorithm for in-Memory Data of the Virtual Memory (가상 메모리 압축을 위한 CAMD 알고리즘 설계)

  • Jang, Seung-Ju
    • The KIPS Transactions:PartA
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    • v.11A no.3
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    • pp.157-162
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    • 2004
  • This paper suggests the CAMD(Compression Algorithm for in-Memory Data) algorithm that is not moved the pages into the swap space by assigning the compressed cache area in the main memory. The CAMD algorithm that supports the virtual memory system takes high memory usability and performance benefit by reducing the page fault. The memory data is not general data. It is extraordinary data format. In general it consists of specific form of data. Therefore. the CAMD algorithm can compress this data efficiently.

An Analysis of Multi-processor System Performance Depending on the Input/Output Types (입출력 형태에 따른 다중처리기 시스템의 성능 분석)

  • Moon, Wonsik
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.12 no.4
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    • pp.71-79
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    • 2016
  • This study proposes a performance model of a shared bus multi-processor system and analyzes the effect of input/output types on system performance and overload of shared resources. This system performance model reflects the memory reference time in relation to the effect of input/output types on shared resources and the input/output processing time in relation to the input/output processor, disk buffer, and device standby places. In addition, it demonstrates the contribution of input/output types to system performance for comprehensive analysis of system performance. As the concept of workload in the probability theory and the presented model are utilized, the result of operating and analyzing the model in various conditions of processor capability, cache miss ratio, page fault ratio, disk buffer hit ratio (input/output processor and controller), memory access time, and input/output block size. A simulation is conducted to verify the analysis result.

Analysis of demand paging Cost for Flash Memory-based Real-Time Embedded Systems (NAND 플래시 메모리 기반의 실시간 임베디드 시스템에서의 demand paging 비용 분석)

  • Lee, Young-Ho;Lim, Sung-Soo
    • Proceedings of the Korean Information Science Society Conference
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    • 2007.06b
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    • pp.445-450
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    • 2007
  • NAND 플래시 메모리 기반의 실시간 임베디드 시스템에서는 일반적으로 shadowing 기법을 통해 프로그램을 수행한다. 그러나 shadowing 기법은 시스템의 부팅 시간을 증가시키고 불필요한 DRAM 영역을 차지한다는 단점 때문에 자원 제약이 심한 실시간 임베디드 시스템에는 적합하지 않다. 이에 대한 대안 중 하나는 demand paging 기법을 활용하는 것이다. 단, demand paging 환경에서는 page fault에 의한 시간 지연 때문에 태스크의 최악 실행 성능을 예측하기 어렵다. 따라서 본 논문에서는 NAND 플래시 메모리 기반의 실시간 임베디드 시스템에서 demand paging 비용을 고려한 태스크 최악 성능 분석 기법을 제안한다. 제안하는 기법은 각 태스크에 대해 demand paging 비용을 계산하고, 이를 전통적인 WCRT 분석 기법과 결합하는 방법을 사용한다. 또한 demand paging 비용과 WCET 분석을 독립적으로 고려함으로써, 최악의 경우에도 분석 결과의 안정성을 보장하고 기존의 방법에 비해 분석 복잡도를 줄였다.

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