• 전력전자학회논문지
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• 제27권4호
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• pp.275-282
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• 2022

In this study, an inverter system connected to a grid through a paralleled LCL filter is proposed. The system consists of two inverters paralleled and operated with interleaved PWM for powering up and performance improvement. Two LCL filters have two separate filter inductors and one set of filter capacitor and grid inductor in common. The differential mode current circulates through two inverters and two filter inductors. The differential mode current is removed from the filter capacitor and the power grid. Accordingly, performance improvement can be achieved due to the reduced currents in the filter capacitor and the reduced harmonics into a grid. A single-phase prototype has been made and tested, and the proposal has been verified.

• 전자공학회논문지 IE
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• 제47권2호
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• pp.13-20
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• 2010

본 논문에서는 PWM을 활용한 전류모드 고효율 PWM DC-DC 전원변환 집적회로(Integrated Circuit)를 설계하였다. IC에 인가할 수 있는 최대 전압은 40[V]이며 입력 전압이 DC 2.8[V]~330[V]일 때 출력 전압을 이 보다 높은 전압으로 바꿀 수 있는 한편 외부 저항비나 트랜스의 권선비를 조정하여 원하는 DC 전압을 만들어 낼 수 있다. 출력전압의 3[%] 오차를 유지하면서 3[A] 이상의 전류를 부하에 공급할 수 있도록 구현하였다. 제작공정은 0.6[um], 2P_2M CMOS 공정을 사용하였다. 전원전압이 3.6[V]일 때 대기상태에서 소비전력은 1[mW]이하이고 최대 전력변환 효율은 약 86[%]이다. 칩 사이즈는 2100*2000[um2]이며, 칩을 소형패키지에 내장하여 조립하였기 때문에 휴대형기기나 소형 전자기기에 적용이 편리하게 되어 있다.

• Journal of Power Electronics
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• 제5권2호
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• pp.104-108
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• 2005

This paper presents the performance improvement of voltage-mode controlled interleaved synchronous buck converters. This is a voltage-mode controlled scheme, where the controllers do not need an external saw-tooth generator for PWM generation and the loop design is easier. The controller implementation requires only a single error amplifier and gives almost current mode control performance. The control scheme uses voltage feedback with two loops similar to current mode control: one for the slow outer loop and the other for the faster inner PWM control loop. To improve the performance of the converter system a coupled inductor is used. This coupled inductor reduces the magnetic size and also improves the converter's transient performance without increasing the steady-state current ripple. The effectiveness of the proposed control scheme is demonstrated through PSIM simulations.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 추계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.216-219
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• 2003

The resonant inverter is widely used for induction heating, electronic ballast and supersonic motor driving circuit. In the meantime, control techniques of PWM, PFM etc.. are mainly applied to control the output power of the resonant inverter. But, in the case of using the half bridge resonant inverter, it is difficult to control the output power by PWM, because its main circuit does not provide the load free-wheeling mode. Therefore, PAM or PFM was usually applied to control output power of half bridge resonant inverter. However, PAM needs a variable DC voltage source, which makes the system structure more complex. On the other hand, in case of PFM, efficiency is declined by operation with poor power factor. This paper Proposed the novel half bridge resonant inverter which can provide the load free-wheeling mode. Also its analysis results for PWM operation with unity fundamental power factor are Presented and compared with other resonant inverters using PWM and PFM.

• Journal of Power Electronics
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• 제16권6호
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• pp.2258-2271
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• 2016

In this paper, some crucial performance characteristics related to the operational reliability of the post-fault Pulse Width Modulated (PWM) rectifiers, such as line current harmonic distortion, Common Mode Voltage (CMV), and current stress on the capacitors, are fully investigated. The aforementioned performance characteristics of post-fault rectifiers are highly dependent on the utilized space vector modulation (SVM) schemes, which are also examined. Detailed analyses of the three most commonly used SVM schemes for post-fault PWM rectifiers are provided, revealing the major differences in terms of the zero vector synthesis approaches. To compare the performances of the three SVM schemes, the operating principles of a post-fault rectifier are presented with various SVM schemes. Using analytical and numerical methods in the time domain, the performances of the line current distortion, common mode voltage and capacitor current are evaluated and compared for each SVM scheme. The proposed analysis demonstrates that the zero vector synthesis approaches of the considered methods have significant impacts on the performance characteristics of rectifiers. In addition, the advantages and disadvantages of the proposed SVM schemes are discussed. The experimental results verify the effectiveness and validity of the proposed analysis.

• Journal of Power Electronics
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• 제12권6호
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• pp.886-894
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• 2012

This paper presents a secondary-side, dual-mode feedback LLC resonant controller IC with dynamic PWM dimming for LED backlight units. In order to reduce the cost, master and slave outputs can be generated simultaneously with a single LLC resonant core based on dual-mode feedback topologies. Pulse Frequency Modulation (PFM) and Pulse Width Modulation (PWM) schemes are used for the master stage and slave stage, respectively. In order to guarantee the correct dual feedback operation, Phased-Locked Loop (PLL)-based automatic duty control circuit is proposed in this paper. The chip is fabricated using $0.35{\mu}m$ Bipolar-CMOS-DMOS (BCD) technology, and the die size is $2.5mm{\times}2.5mm$. The frequency of the gate driver (GDA/GDB) in the clock generator ranges from 50 to 425 kHz. The current consumption of the LLC resonant controller IC is 40 mA for a 100 kHz operation frequency using a 15 V supply. The duty ratio of the slave stage can be controlled from 40% to 60% independent of the frequency of the master stage.

• 한국전자통신학회논문지
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• 제18권5호
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• pp.859-866
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• 2023

본 논문은 MCU와 LED 드라이버를 활용한 감마 보정, 논 플리커, 구동 소음 제거 등의 개선 방안을 적용하여 LED 시스템의 사용자 친화적 시스템을 구성하는 데 초점을 맞추고 있다. 실험 결과, LED 드라이버의 22kHz PWM 모드는 가청 주파수 바깥 영역에서 소음이 발생하여 사용자는 실질적으로 소음을 인지할 수 없었으며, 정상 동작 구간인 지연율 5% 이내의 풀업 저항 값은 3kHz PWM 모드 시 1kΩ ~ 10kΩ 이며, 22kHz PWM 모드는 1kΩ ~ 2kΩ 로 확인되었다. 또한, 감마 보정을 통해 비선형적인 인간의 시각 시스템에 맞게 최적화하여 정확한 대비와 명암을 표현할 수 있으며, 결과적으로 기존의 LED 시스템보다 더 자연스럽고 정확한 표현이 가능한 LED 시스템의 개발과 사용자의 시각적인 경험을 개선할 수 있을 것으로 기대된다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1999년도 전력전자학술대회 논문집
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• pp.358-361
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• 1999

In auxiliary block of high speed train power factor correction and harmonics reduction is very important issue for efficient energy transport. The GTO-equipped PWM converter is used for traction untill resently. But the rising power capability of IGBTs resently allows to build IGBT-equipped PWM converter with a considerably increased switching frequency. This paper presents switching pattern, control method, operation mode and tuned filter to reduce dc link voltage ripple for paralleled converter.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1999년도 전력전자학술대회 논문집
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• pp.362-365
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• 1999

In this paper, the method of reducing harmonics and correcting of power factor in single PWM converter associated with diode rectifier and boos converter is studied. The ac-dc converter in which the harmonic distortion in the input current is reduced using a third harmonic injected PWM is proposed. A lower switching power loss and easy configuration o control circuit are obtained by adopting discontinuous current mode. Simulation and experimental results of ac-dc converter with 5[KHz] switching frequency are presented and correction of power factor and reduction of total harmonic distortion was established.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2006년도 전력전자학술대회 논문집
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• pp.292-294
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• 2006

This paper presents a study on the use of improved space-vector modulation of VSI employing only four switches, four body diodes. Different switching sequence strategy for vector control for inverter fault mode are described. The influence of different switching patterns at same modulation index and improved PWM method is proposed. The proposed PWM is compared with conventional PWM. Simulation and experimental results are presented.