• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.11
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• pp.2168-2174
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• 2009

Electrical railway system consists of rolling stock, track, signal and streetcar line system. Track circuit system is a vital system due to checking the location of trains. Track circuits are divided by using frequency and isolated electrically. Currently, there is not a regulation for the distance between track circuits using identical frequency. In case of installing additional track circuits in large stations or marshalling yard, the problem which is that the signal is not exactly transmitted to the track circuit occurs due to the mutual interference. In other words, the track circuit properly is not operated on account of wrong induction current by the mutual inductance between track circuits. In this paper, we suggest the electrical model between track circuits and numerically calculate demanded parameters in electrical model. The distance between track circuits satisfying the mutual inductance which does not happen to the mutual interference phenomenon is presented about the distance of track circuit. It is proved by using Matlab and PSpice program as the amplitude of mutual induced current.

• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.314-317
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• 2000

In order to analyze the characteristics of complicated TFT-LCD (Thin Film Transistor-Liquid Crystal Display) circuits, it is indispensible to use simulation programs. In this study, we present a systematic method of extracting the input parameters of poly-Si TFT for Spice simulation. This method is applied to two different types of poly-Si TFTs fabricated in our group with good results. Among the Spice simulators, Pspice has the graphic user interface feature making the composition of complicated circuits easier. We added successfully a poly-Si TFT model on the Pspice simulator, which would contribute to efficient simulations of poly-Si TFT-LCD pixels and arrays.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.21 no.5
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• pp.60-67
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• 2007

In this paper, a simulation method of the internal winding fault is proposed to calculate winding current and electromagnetic force in a distribution power transformer by suing FEM program. The model of the transformer is a single phase, 60[Hz], 1[MVA], 22.9[kV]/220[V], cable-type winding. The short-circuit current and electromagnetic force are calculated by FEM(Finite Element Method) program(Flux2D) and the results we verified with theoretical formula and PSPICE program. The simulation results are fairly good agreement with the other verified methods within 5[%] error rate. The turn-to-turn short-circuit current is 500 times of the rated current and the electromagnetic force is about $20{\sim}200times$. The method presented in this study may serve as one of the useful tools in the electromagnetic force analysis of the transformer winding behavior under the short circuit condition for design of the structure.

• Journal of the Korean Magnetics Society
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• v.12 no.5
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• pp.168-173
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• 2002

Electrostatic discharge characteristics were studied by connecting human body model (HBM) with tunneling magnetoresistance (TMR) device in this research. TMR samples were converted into electrical equivalent circuit with HBM and it was simulated utilizing PSPICE. Discharge characteristics were observed by changing the component values of the junction model in this equivalent circuit. The results show that resistance and capacitance of the TMR junction were determinative components that dominate the sensitivity of the electrostatic discharge(ESD). Reducing the resistance oi the junction area and lead line is more profitable to increase the recording density rather than increasing the capacitance to improve the endurance for ESD events. Endurance at DC state was performed by checking breakdown and failure voltages for applied DC voltage. HBM voltage that a TMR device could endure was estimated when the DC failure voltage was regarded as the HBM failure voltage.

• International Journal of Internet, Broadcasting and Communication
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• v.5 no.1
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• pp.6-8
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• 2013

In this paper, we present an intelligent digital controller circuit which can be applied to automatic voltage regulation. The proposed solid state transformer with Pspice simulation model shows that our approach is very efficient and produces the desirable output. It is comparable to an ordinary magnetic coupled autotransformer.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.17 no.5
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• pp.509-520
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• 1992

AIGaAs /GaAs HBT OR /NOR gate. which can be used for high speed digital system was designed. Equivalent circuit parameters of HBT were obtained from Gummel-Poon's model and direct extraction method. Simulation results with PSPI CE showed that propagation delay time and cutoff toggle frequency of designed gate were 25ps and 200Hz, respectively. the designed gate exhibited superior properties to the recently reported HBT ECL and MESFET SCFL when considering the fan-out characteristics and noise margin.

• Proceedings of the KSR Conference
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• 2009.05a
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• pp.879-891
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• 2009

Impedance of rails is increased by the magnetic coupling between rails and reinforcing bars in the concrete slab track. Currently, the current of track circuit has been compensated by installing the compensation capacitors on track circuit because of increasing the impedance of rails. In case of a rapid transit railway, the compensation capacitors are installed every 20[m] to compensate the current of track circuit in the concrete slab track. Because the interval of one block for a rapid transit railway is as long as 1500[m], the compensation capacitors are installed about the number of 70$\sim$75 on track circuit. However, in case the compensation capacitors are broken over the number of three, it is a problem that the amplitude of current is under standard amplitude of current which is 0.8[A]. In this paper, it was suggested installing a compensation capacitor by using resonance phenomenon on the concrete slab track. We represent the electrical model of track circuit and the four terminal network, calculate the parameters demanded for the electrical model in the concrete slab track. Also, we computed the position and capacitance of the compensation capacitor about 2040[Hz], 2400[Hz], 2760[Hz], 3120[Hz] which currently is the track circuit frequency in the Gyeongbu rapid transit railway and demonstrated the validity of it, using the Matlab and PSpice program.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.21 no.5
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• pp.106-111
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• 2007

After the semiconductor processing, wafer is attracted by ESC(Electrostatic Chuck) with remaining electric charge. That causes too many problems for examples, sliding of wafer, popping or broken. This paper presents the model of ESC for silicon wafer, which is modeled by electrical circuit component such as capacitor. The simulations using PSpice result in the phenomenon of silicon wafer was charged by ESC. In this paper we suggest the discharging method. for wafer.

• Journal of the Semiconductor & Display Technology
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• v.22 no.4
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• pp.179-184
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• 2023

We propose the modeling methodology of CMOS inverter made of LTPO TFT using a machine learning. LTPO can achieve advantages of LTPS TFT with high electron mobility as a driving TFT and IGZO TFT with low off-current as a switching TFT. However, since the unified model of both LTPS and IGZO TFTs is still lacking, it is necessary to develop a SPICE-compatible compact model to simulate the LTPO current-voltage characteristics. In this work, a generic framework for combining the existing formula of I-V characteristics with artificial neural network is presented. The weight and bias values of ANN for LTPS and IGZO TFTs is obtained and implemented into PSPICE circuit simulator to predict CMOS inverter. This methodology enables efficient modeling for predicting LTPO TFT circuit characteristics.

• Journal of the Semiconductor & Display Technology
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• v.22 no.4
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• pp.136-141
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• 2023

The continuous shrinking of transistors in integrated circuits leads to difficulties in improving performance, resulting in the emerging transistors such as nanosheet field-effect transistors. In this paper, we propose a TCAD-machine learning framework of nanosheet FETs to model the current-voltage characteristics. Sentaurus TCAD simulations of nanosheet FETs are performed to obtain a large amount of device data. A machine learning model of I-V characteristics is trained using the multi-layer perceptron from these TCAD data. The weights and biases obtained from multi-layer perceptron are implemented in a PSPICE netlist to verify the accuracy of I-V and the DC transfer characteristics of a CMOS inverter. It is found that the proposed machine learning model is applicable to the prediction of nanosheet field-effect transistors device and circuit performance.