• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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• pp.1214-1218
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• 2006

We introduced simple fabrication process for field emission devices based on carbon nanotubes (CNTs) emitters. Instead of using the ITO material as a transparent electrode, a metal (Au) with thickness of 5-20nm was used. Moreover, the ITO patterning process was eliminated by depositing metal layer, before the CNT printing process. In addition, the thin metal layer on photo resist (PR) layer was used as UV block. We fabricated the CNT field emission arrays of triode structure with simple process. And I-V characteristics of field emission arrays were measured. The maximum current density of $254{\mu}A/cm2$ was achieved when the gate and the anode voltage was kept 150V and 3000V, respectively. The distance between anode and cathode was kept constant.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 추계학술대회 논문집 Vol.14 No.1
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• pp.209-212
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• 2001

Polyimide(PI) films have been considered as the interlayer dielectric materials due to low dielectric constant, low water absorption, high gap-fill and planarization capability. The PI mm Was etched with using inductively coupled plasma (ICP). The etching characteristics such as etch rate and selectivity were evaluated to gas mixing ratio. High etch rate was $8300{\AA}/min$ and vertical profile was approximately acquired $90^{\circ}$ at $CF_{4}/(CF_{4}+O_{2})$ of 0.2. The selectivies of polyimide to PR and $SiO_{2}$ were 1.2, 5.9, respectively. The etching profiles of PI films with an aluminum pattern were measured by a scanning electron microscope (SEM). The chemical states on the PI film surface were investigated by x-ray photoelectron spectroscopy (XPS). Radical densities of oxygen and fluorine in different gas mixing ratio of $O_{2}/CF_{4}$ were investigated by optical emission spectrometer (OES).

• Current Photovoltaic Research
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• 제1권1호
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• pp.69-72
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• 2013

Combined nano- and micro-wires (CNMWs) Si arrays were prepared using PR patterning and silver-assisted electroless etching. A $POCl_3$ doping process was applied to the fabrication of CNMWs solar cells. KOH solution was used to remove bundles in CNMWs and the etching time was varied from 30 to 240 s. The lowest reflectance of 3.83% was obtained at KOH etching time of 30 s, but the highest carrier lifetime of $354{\mu}s$ was observed after the doping process at 60 s. At the same etching time, a $V_{oc}$ of 574 mV, $J_{sc}$ of $28.41mA/cm^2$, FF of 74.4%, and Eff. of 12.2% were achieved in the CNMWs solar cell. CNMWs solar cells have potential for higher efficiency by improving the post-process and surface-rear side structure.

• 한국산학기술학회논문지
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• 제18권5호
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• pp.674-680
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• 2017

본 논문은 현재 개인 휴대기기 및 대형 디스플레이 장비의 제어에서 폭넓게 사용되고 있는 터치스크린 패널 (TSP; Touch Screen Panel)의 정상 작동 유무를 확인하기 위한 micro bump 제작 기술에 관한 연구이다. 터치스크린 패널은 감압식, 정전식 등의 여러 가지 방식이 있으나 지금은 편리성에 의하여 정전식 방식이 주도하고 있다. 정전식의 경우 해당하는 좌표의 접촉에 따라 전기적 신호가 변화하게 되고, 이를 통하여 접촉 위치를 확인할 수 있으며 따라서 접촉 위치에 따른 전기 특성 검사가 필수적이다. 검사공정에서 TSP의 모델이 변경됨에 따라 새로운 micro bump를 제작이 및 검사 프로그램의 수정이 필수적이다. 본 논문에서는 새로운 micro bump 제작 시 mask를 사용하지 않아 보다 경제적이며 변화에 대응이 유연한 maskless lithography 시스템을 이용하여 micro bump 제작 가능성에 대하여 확인하였다. 이를 위하여 제작되는 bump의 pitch에 따른 전기장 간섭 시뮬레이션을 진행하였으며, maskless lithogrphy 공정을 적용하기 위한 패턴 이미지를 생성하였다. 이후 MEMS 기술에 해당하는 PR(Photo Resist) 패터닝 공정에서 노광(Lithography) 공정 및 현상(Developing) 공정을 통하여 PR 마스크를 제작한 후 electro-plating 공정을 통하여 micro bump를 제작하였다.

• 한국정보통신학회논문지
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• 제11권6호
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• pp.1099-1103
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• 2007

본 연구는 기존의 방식으로 만든 비정질 실리콘 박막 트랜지스터의 제조공정에서 발생되는 결함에 대한 원인을 분석하고 해결함으로써 수율을 증대시키고 신뢰성을 개선하고자한다. 본 연구의 수소화 된 비정질 실리콘 박막 트랜지스터는 Inverted Staggered 형태로 게이트 전극이 하부에 있다. 실험 방법은 게이트전극, 절연층, 전도층, 에치스토퍼 및 포토레지스터층을 연속 증착한다. 스토퍼층을 게이트 전극의 패턴으로 남기고, 그 위에 n+a-Si:H층 및 NPR(Negative Photo Resister)을 형성시킨다. 상부 게이트 전극과 반대의 패턴으로 NPR층을 패터닝 하여 그것을 마스크로 상부 n+a-Si:H 층을 식각하고, 남아있는 NPR층을 제거한다. 그 위에 Cr층을 증착한 후 패터닝하여 소오스-드레인 전극을 위한 Cr층을 형성시켜 박막 트랜지스터를 제조한다. 이렇게 제조한 박막 트랜지스터에서 생기는 문제는 주로 광식각공정시 PR의 잔존이나 세척시 얇은 화학막이 표면에 남거나 생겨서 발생되며, 이는 소자를 파괴시키는 주된 원인이 된다. 그러므로 이를 개선하기 위하여 ashing이나 세척공정을 보다 엄격하게 수행하였다. 이와 같이 공정에 보다 엄격한 기준의 세척과 여분의 처리 공정을 가하여 수율을 확실히 개선 할 수 있었다.

• 한국전기전자재료학회논문지
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• 제14권2호
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• pp.93-98
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• 2001

YMnO$_3$ films are excellent gate dielectric materials of ferroelectric random access memories (FRAMs) with MFSFET (metal -ferroelectric-semiconductor field effect transistor) structure because YMnO$_3$ films can be deposited directly on Si substrate and have a relatively low permittivity. Although the patterning of YMnO$_3$ thin films is the requisite for the fabrication of FRAMs, the etch mechanism of YMnO$_3$ thin films has not been reported. In this study, YMnO$_3$thin films were etched with Cl$_2$/Ar gas chemistries in inductively coupled plasma (ICP). The maximum etch rate of YMnO$_3$ film is 285$\AA$/min under Cl$_2$/(Cl$_2$+Ar) of 1.0, RF power of 600 W, dc-bias voltage of -200V, chamber pressure of 15 mTorr and substrate temperature of $25^{\circ}C$. The selectivities of YMnO$_3$ over CeO$_2$ and $Y_2$O$_3$ are 2.85, 1.72, respectively. The selectivities of YMnO$_3$ over PR and Pt are quite low. Chemical reaction in surface of the etched YMnO$_3$ thin films was investigated with X-ray photoelectron spectroscopy (XPS) surface of the selected YMnO$_3$ thin films was investigated with X-ray photoelectron spectroscopy(XPS) and secondary ion mass spectrometry (SIMS). The etch profile was also investigated by scaning electron microscopy(SEM)

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2005년도 춘계학술대회 논문집
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• pp.1206-1209
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• 2005

In recent, injection molding process for features in sub-micron scale is under active development as patterning nano-scale features, which can provide the master or stamp for molding, and becomes available around the world. Injection molding has been one of the most efficient processes for mass production of the plastic product, and this process is already applied to nano-technology products successfully such as optical storage media like DVD or BD which is a large area plastic thin substrate with nano-scale features on its surface. Bio chip for like DNA sequencing may be another application of this plastic substrate. The DNA can be sequenced using order of 100 nm pore structure when making the DNA flow through the pore structure. Agarose gel and silicon based chip have been used to sequence the DNA, but injection molded plastic chip may have benefit in terms of cost. This plastic DNA sequencing chip has plenty of pillars in order of 100 nm in diameter on the substrate. When the usual features in case of DVD or BD have very low aspect ratio, even less than 0.5, but the DNA chip will have relatively high aspect ratio of about 2. It is not easy to injection mold the large area thin substrate with sub-micron features on its surface due to the characteristics of the molding process and it becomes much more difficult when the aspect ratio of the features becomes high. We investigated the effect of the molding parameters for injection molding with high aspect ratio nano-scale features and injection molded some plastic DNA sequencing chips. We also fabricated PR masters and Ni stamps of the DNA chip to be used for molding