• 한국전기전자재료학회논문지
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• 제14권10호
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• pp.779-784
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• 2001

In this work, we studied the characteristics of nitride films for the optimization of PMD(pro-metal dielectric) linear process, which can be applied to the recent semiconductor manufacturing process. We split the deposit condition of nitride films into four parts such as PO(protect overcoat) nitride, baseline, low hydrogen and high stress and low hydrogen, respectively. We tried to find out correlation between BPSG deposition and densification. In order to analyze the changes of Si-H and Si-NH-Si bonding density, we used FTIR area method. We also investigated the crack generation on wafer edge after BPSG densification, and the changes of nitride film stress as a function of RF power variation to judge whether the deposited films.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 춘계학술대회 논문집 반도체재료
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• pp.38-41
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• 2001

In this work, we have been studied the characteristics of each nitride film for the optimization of PMD(pre-metal dielectric) liner nitride process, which can applicable in the recent semiconductor manufacturing process. The deposition conditions of nitride film were splited by PO (protect overcoat) nitride, baseline, low hydrogen, high stress and low hydrogen, respectively. And also we tried to catch hold of correlation between BPSG(boro-phospho silicate glass) deposition and densification. Especially, we used FTIR area method for the analysis of density change of Si-H bonding and Si-NH-Si bonding, which decides the characteristics of nitride film. To judge whether the deposited films were safe or not, we investigated the crack generation of wafer edge after BPSG densification, and the changes of nitride film stress as a function of RF power variation.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 D
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• pp.1327-1329
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• 1998

It is very important to select superior inter-layer PMD(Pre Metal Dielectric) materials which can act as penetration barrier to various impurities created by CMP processes. In this paper, hot carrier degradation and device characteristics were studied with material variation of PMD-1 layers, which were split by LP-TEOS, SR-Oxide, PE-Oxynitride, PE-Nitride, PE-TEOS films. It was observed that the oxynitride and nitride using plasma was greatly decreased in hot carrier effect in comparison with silicon oxide. Consequently, silicon oxide turned out to be a better PMD-1 material than PE-oxynitride and PE-nitride. Also, LP-TEOS film was the best PMD-1 material Among the silicon oxides.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 하계학술대회 논문집 Vol.8
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• pp.81-81
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• 2007

Chemical mechanical polishing (CMP) 공정은 deep 서브마이크론 집적회로의 다층배선구조률 실현하기 위해 inter-metal dielectric (IMD), inter-layer dielectric layers (ILD), pre-metal dielectric (PMD) 층과 같은 절연막 외에도 W, Al, Cu와 같은 금속층을 평탄화 하는데 효과적으로 사용되고 있으며, 다양한 소자 제작 및 새로운 물질 등에도 광범위하게 응용되고 있다. 하지만 Cu damascene 구조 제작으로 인한 CMP 응용 과정에서, 기계적으로 깨지기 쉬운 65 nm의 소자 이하의 구조에서 새로운 저유전상수인 low-k 물질의 도입으로 인해 낮은 하력의 기계적 연마가 필요하게 되었다. 본 논문에서는 전기화학적 기계적 연마 적용을 위해, I-V 특성 곡선을 이용하여 active, passive, transient, trans-passive 영역의 전기화학적 특성을 알아보았으며, Cu 막의 표면 형상을 알아보기 위해 scanning electron microscopy (SEM) 측정과 energy dispersive spectroscopy (EDS) 분석을 통해 금속 화학적 조성을 조사하였다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2014년도 전력전자학술대회 논문집
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• pp.95-96
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• 2014

450mm 반도체 CVD 장비 개발 및 300mm F-CVD (Flowable CVD) 공정 개발에 있어서 공정 마진 확보 및 막질 품질 개선을 위해 주파수 가변형 RF Generator가 필수적으로 요구되고 있다. 20nm이하 STI (Shallow Trench Isolation), PMD (Pre-metal Dielectric) & IMD (Inter-Metal Dielectric) 미세공정 gap fill에 많은 문제점이 도출되고 있으며, 이유로는 Generator 고정 주파수에서 Matching Time delay 또는 Shooting에 의한 산포의 한계로 파악되었으며, 주파수 가변에 의한 고속 Tune 기능이 요구되어진다. 따라서 400kHz 주파수 가변형 RF-Generator 개발을 진행하였으며 본 논문을 통해 개발되어진 장비의 성능과 시험 평가한 결과를 소개하고자 한다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 춘계학술대회 논문집 센서 박막재료 반도체 세라믹
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• pp.149-153
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• 2003

Chemical mechanical polishing (CMP) technology for global planarization of multi-level inter-connection structure has been widely studied for the next generation devices. CMP process has been paid attention to planarized pre-metal dielectric (PMD), inter-layer dielectric (ILD) interconnections. Expecially, shallow trench isolation (STI) used to CMP process on essential. Recently, the direct STI-CMP process without the conventional complex reverse moat etch process has established by using slurry additive with the high selectivity between $SiO_2$ and $Si_3N_4$ films for the purpose of process simplification and n-situ end point detection(EPD). However, STI-CMP process has various defects such as nitride residue, tom oxide and damage of silicon active region. To solve these problems, in this paper, we studied the planarization characteristics using a high selectivity slurry(HSS). As our experimental results, it was possible to achieve a global planarization and STI-CMP process could be dramatically simplified. Also we estimated the reliability through the repeated tests with the optimized process conditions in order to identify the reproducibility of HSS STI-CMP process.