• Title/Summary/Keyword: PLL method

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Seamless Transfer Operation Between Grid-connected and Stand-Alone Mode in the Three-phase Inverter (3상 인버터의 계통연계 및 독립운전모드 전환 연구)

  • Lee, Wujong;Jo, Hyunsik;Lee, Hak Ju;Cha, Hanju
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.62 no.2
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    • pp.201-207
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    • 2013
  • This paper propose seamless transfer operation between grid-connected and stand-alone mode in the three-phase inverter for microgrid. The inverter operates grid-connected mode and stand-alone mode. Grid-connected mode is the inverter connected to grid and stand-alone mode is to deliver energy to the load from inverter at grid fault. When conversion from gird-connected to stand-alone mode, the inverter changes current control to voltage control. When grid restored, the inverter system is conversion from stand-alone to grid-connected mode. In this case, load phase and grid phase are different. Therefore, synchronization is essential. Thus Seamless transfer operation stand-alone to grid-connected mode. In this paper, propose sealmless transfer operation between grid-connceted and stand-alome mode, and this method is verified through simulation and experiment.

New Reference Generation for a Single-Phase Active Power Filter to Improve Steady State Performance

  • Lee, Ji-Heon;Jeong, Jong-Kyou;Han, Byung-Moon;Bae, Byung-Yeol
    • Journal of Power Electronics
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    • v.10 no.4
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    • pp.412-418
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    • 2010
  • This paper proposes a new algorithm to generate a reference signal for an active power filter using a sliding-window FFT operation to improve the steady-state performance of the active power filter. In the proposed algorithm the sliding-window FFT operation is applied to the load current to generate the reference value for the compensating current. The magnitude and phase-angle for each order of harmonics are respectively averaged for 14 periods. Furthermore, the phase-angle delay for each order of harmonics passing through the controller is corrected in advance to improve the compensation performance. The steady-state and transient performance of the proposed algorithm was verified through computer simulations and experimental work with a hardware prototype. A single-phase active power filter with the proposed algorithm can offer a reduction in THD from 75% to 4% when it is applied to a non-linear load composed of a diode bridge and a RC circuit. The active power filter with the proposed reference generation method shows accurate harmonic compensation performance compared with previously developed methods, in which the THD of source current is higher than 5%.

Power Decoupling Control of the Bidirectional Converter to Eliminate the Double Line Frequency Ripple (더블라인 주파수 제거를 위한 양방향 컨버터의 전력 디커플링 제어)

  • Amin, Saghir;Choi, Woojin
    • Proceedings of the KIPE Conference
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    • 2018.11a
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    • pp.62-64
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    • 2018
  • In two-stage single-phase inverters, inherent double line frequency component is present at both input and output of the front-end converter. Generally large electrolytic capacitors are required to eliminate the ripple. It is well known that the low frequency ripple shortens the lifespan of the capacitor hence the system reliability. However, the ripple can hardly be eliminated without the hardware combined with an energy storage device or a certain control algorithm. In this paper, a novel power-decoupling control method is proposed to eliminate the double line frequency ripple at the front-end converter of the DC/AC power conversion system. The proposed control algorithm is composed of two loop, ripple rejection loop and average voltage control loop and no extra hardware is required. In addition, it does not require any information from the phase-locked-loop (PLL) of the inverter and hence it is independent of the inverter control. In order to prove the validity and feasibility of the proposed algorithm a 5kW Dual Active Bridge DC/DC converter and a single-phase inverter are implemented, and experimental results are presented.

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Characteristics comparison of food parallel type high frequency resonant inverter by driving signal control method (구동신호 제어기법에 의한 부하병렬형 고주파 인버터의 특성비교)

  • 이봉섭;원재선;김동희
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.17 no.1
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    • pp.94-102
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    • 2003
  • This paper describes the load parallel type full-bridge high frequency resonant inverter can be used as power source. Output control method of proposed circuit is compared with pulse frequency modulation(PFM), pulse width modulation(PWM) and pulse phase variation(Phase-Shift). The analysis of the proposed circuit is generally described by using the normalized parameters. The principle of basic operating and the its characteristics are estimated according to the parameters such as switching frequency(${\mu}$), pulse width($\theta$d) the variation of phase angle($\phi$) by three driving signal patterns. Experimental results are presented to verify the theoretical analysis result. In future, Characteristics by three driving signal control method is provided as useful data in case of output control of a power supply in various fields as induction heating application, DC-DC converter etc.

Possibility of Wound Dressing Using Poly(L-leucine)/poly(ethylene glycol)/poly(L-leucine) Triblock Copolymer

  • Kim, Hyeon-Jeong;Jo, Jong-Su
    • Proceedings of the KOSOMBE Conference
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    • v.1997 no.11
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    • pp.249-254
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    • 1997
  • ABA-type block copolymers composed of poly(L-leucine)(PLL) as the A component and poly(ethylene glycol)(PEG) as the B component were synthesized by ring-opening polymerization of L-leucine N-carboxyanhydride initiated by primary amino group located at both ends of PEG chain. A silver sulfadiazine(AgSD)-impregnated wound dressing of sponge-type was prepared by the lyophilization method. Morphological structure of this wound dressing obtained by scanning electron microscopy(SEM) was composed of a dense skin layer and a macroporous inner sponge layer. Equilibrium water content(EWC) of wound dressing was above 10%. It increased with an increased of PEO content in the block copolymer due to the hydrophilicity of PEO. AgSD release from AgSD- impregnated wound dressing in PBS buffer(pH=7.4) was dependent on PEG composition in the block copolymer. Therefore, EWC and release of AgSD can be control by PEG composition. Antibacterial capacity of AgSD-impregnated wound dressing was examined in agar plate against Pseudmonas aeruginosa and Stapplococus aruous. Cytotoxicity of the wound dressing was evaluated by studing mouse skin fibroblast(L929). From the behavior of antimicrobial releasing and the investigation of the suppression of bacterial proliferation, it was supposed that the wound dressing containing antibiotics could protect the wound surfaces from bacterial invasion to suppress the bacterial proliferation effectively. In cytotoxicity observation, cellular damage was reduced by the control led released of AgSD from the LEL sponge matrix of AgSD-medicated wound dressing. In vivo test, granulous tissue formation and wound contraction or the AgSD and DHEA impregnated wound dressing were aster than any other groups.

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Phase Jitter Analysis of Overlapped Signals for All-to-All TWSTFT Operation

  • Juhyun Lee;Ju-Ik Oh;Joon Hyo Rhee;Gyeong Won Choi;Young Kyu Lee;Jong Koo Lee;Sung-hoon Yang
    • Journal of Positioning, Navigation, and Timing
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    • v.12 no.3
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    • pp.245-255
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    • 2023
  • Time comparison techniques are necessary for generating and keeping Coordinated Universal Time (UTC) and distributing standard time clocks. Global Navigation Satellite System (GNSS) Common View, GNSS All-in-View, Two-Way Satellite Time and Frequency Transfer (TWSTFT), Very Long Baseline Interferometry (VLBI), optical fiber, and Network Time Protocol (NTP) based methods have been used for time comparison. In these methods, GNSS based time comparison techniques are widely used for time synchronization in critical national infrastructures and in common areas of application such as finance, military, and wireless communication. However, GNSS-based time comparison techniques are vulnerable to jamming or interference environments and it is difficult to respond to GNSS signal disconnection according to the international situation. In response, in this paper, Code-Division Multiple Access (CDMA) based All-to-All TWSTFT operation method is proposed. A software-based simulation platform also was designed for performance analysis in multi-TWSTFT signal environments. Furthermore, code and carrier measurement jitters were calculated in multi-signal environments using the designed simulation platform. By using the technique proposed in this paper, it is anticipated that the TWSTFT-based time comparison method will be used in various fields and satisfy high-performance requirements such as those of a GNSS master station and power plant network reference station.

Design of a Wideband Frequency Synthesizer with Low Varactor Control Voltage (낮은 바렉터 제어 전압을 이용한 광대역 주파수 합성기 설계)

  • Won, Duck-Ho;Choi, Kwang-Seok;Yun, Sang-Won
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.1
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    • pp.69-75
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    • 2010
  • In this paper, with using the clapp type VCO(Voltage Controlled Osillator) configuration a wideband frequency synthesizer in UHF band is proposed. In order to design a wideband frequency synthesizer, the variation of phase in the negative resistance circuit as well as the load circuit was analyzed. Based on this result we propose a method to widen the operation range of the VCO. A frequency synthesizer using the proposed wideband VCO was designed and fabricated. It is shown that the synthesizer has the operating frequency range of 740~1,530 MHz by 0~5 V varactor tuning voltage, and it had the output power of 2~-6 dBm. Moreover, the phase noise measured as -77 dBc/Hz at 10 kHz offset, and as -108 dBc/Hz at 100 kHz offset from the oscillation frequency.

Design of the 1.9-GHz CMOS Ring Voltage Controlled Oscillator using VCO-gain-controlled delay cell (이득 제어 지연 단을 이용한 1.9-GHz 저 위상잡음 CMOS 링 전압 제어 발진기의 설계)

  • Han, Yun-Tack;Kim, Won;Yoon, Kwang-Sub
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.4
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    • pp.72-78
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    • 2009
  • This paper proposes a low phase noise ring voltage controlled oscillator(VCO) with a standard $0.13{\mu}m$ CMOS process for PLL circuit using the VCO-gain-controlled Delay cell. The proposed Delay cell architecture with a active resistor using a MOS transistor. This method can reduced a VCO gain so that improve phase noise. And, Delay cell consist of Wide-Swing Cascode current mirror, Positive Latch and Symmetric load for low phase noise. The measurement results demonstrate that the phase noise is -119dBc/Hz at 1MHz offset from 1.9GHz. The VCO gain and power dissipation are 440MHz/V and 9mW, respectively.

10 GHz TSPC(True Single Phase Clocking) Divider Design (10 GHz 단일 위상 분주 방식 주파수 분배기 설계)

  • Kim Ji-Hoon;Choi Woo-Yeol;Kwon Young-Woo
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.8 s.111
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    • pp.732-738
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    • 2006
  • Divide-by-2 and divide-by-4 circuits which can operate up to 10 GHz are designed. A design method used in these circuits is the TSPC(True Single Phase Clocking) topology. The structure of the TSPC dividers is very simple because they need only a single clock and purely consist of smalt sized cmos devices. Through measurements, we find the fact that in proportion to the bias voltage, the free running frequency increases and the operation region also moves toward a higher frequency region. For operating conditions of bias voltage $3.0{\sim}4.0V$, input power 16dBm and dcoffset $1.5{\sim}2.0V$, 5 GHz and 2.5 GHz output signals divided by 2 and 4 are measured. The layout size of the divide-by-2 circuit is about $500{\times}500 um^2$($50{\times}40um^2$ except pad interconnection part).