• Title/Summary/Keyword: PLL algorithm

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Simplified High Efficiency Drive System of Induction Motor using PLL Technique (PLL 방식을 이용한 유도전동식 고효율 운전장치의 간략화에 관한 연구)

  • 유철로;이공희;이성룡
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.35 no.9
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    • pp.403-408
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    • 1986
  • In this paper, the method to improve the efficiency of an induction motor at light load is discussed. Efficiency of induction motor can be very substantially improved by keeping the slip frequency as constant. Therefore, to simplify the control loop, algorithm which maintain constant slip frequency and control the input voltage is adopted. Simplified high efficiency drive of induction motor using PLL technique is suggested. In order to verify the validity of this system, the test results are compared with those obtained by optimal slip drive system and then we found closer to the optimal efficiency. For example its efficiency is improved from 18[%] to 42[%] at a few fraction of the full load (20[%]).

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A study on the Abnormal Voltage Detection Algorithm For Single-Phase UPS using the PLL Based on Virtual DQ Synchronous Reference Frame (가상 DQ 기반 PLL을 이용한 단상 UPS용 이상전원검출 알고리즘에 대한 연구)

  • Lee, Sang Hee;Lee, Su Hyoung;Mun, Tae Yang;Kim, Jun Seok
    • Proceedings of the KIPE Conference
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    • 2018.07a
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    • pp.378-379
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    • 2018
  • 본 연구는 속응형 단상 UPS(Uninterruptible Power Supply)를 위한 이상전원 검출 알고리즘에 관한 연구이다. 한국전력공사 등의 특수한 UPS 응용분야에서는 전원의 1/4주기 이내에 전원의 이상을 검출하고 UPS가 정상 기동할 필요가 있다. 본 연구에서는 가상DQ기반의 고성능 PLL(Phase Locked Loop)을 응용하여 별도의 전원검출 알고리즘 없이도 임의의 위상각에서 1/4주기이내에 전원의 크기 및 위상에 관한 오류를 검출할 수 있음을 보인다. 제시된 방법은 시뮬레이션 및 실험을 통해 검증하였다.

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Performance Improvement of Sensorless Drives for Surface Mounted Permanent Magnet Synchronous Motor using a Dual PLL Structure (이중 PLL 구조를 이용한 표면부착형 영구자석 동기전동기 센서리스 구동장치의 성능 개선)

  • Lee, Kwang-Woon
    • The Transactions of the Korean Institute of Power Electronics
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    • v.22 no.6
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    • pp.543-546
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    • 2017
  • This paper presents a simple approach for improving the performance of back-electromotive force (back-EMF)-estimation-based sensorless drives for surface-mounted permanent magnet synchronous motors (SPMSM). Similar to conventional approaches, a hypothetical d-q synchronous reference frame model of SPMSM is employed in the proposed approach to estimate the back-EMFs. This approach also employs a dual phase locked loop structure to compensate for the effect of the dead time and parameter uncertainty of the inverter on the estimated back-EMFs. The proposed algorithm is validated by conducting experiments.

Implementation of LVRT algorithm of Grid-Connected PCS with Low Pass Notch PLL Technique (LPN(Low Pass Notch) PLL 기법을 활용한 계통연계형 PCS에서의 LVRT 알고리즘 구현)

  • Shin, Dongsul;Lee, Kyoung-Jun;Kim, Hee-Je;Lee, Jong-Pil;Kim, Tae-Jin;Yoo, Dong-Wook
    • Proceedings of the KIPE Conference
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    • 2014.07a
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    • pp.516-517
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    • 2014
  • 태양광과 풍력발전 등 분산전원의 대용량 발전이 기존 계통에 미치는 영향이 커짐에 따라, 계통 전압의 안정적인 유지를 위해 필요한 지원이 계통에 연계되는 분산전원들에게 요구되고 있다. 특히나 Low Voltage Ride Through (LVRT) 시에는 계통에서 탈락되지 않는 것은 물론이고, 계통전압 회복을 돕기위해 무효전력을 주입해야 한다. 이러한 사고 상황에서 계통에서 탈락되지 않고 계속적인 계통지원을 위해서는 빠르고 정확한 위상 추종이 필수적이다. 본 논문은 고조파에 강인하고 응답특성이 우수한 Low Pass Notch (LPN) PLL 기법을 LVRT에 적용하여 이의 우수함을 확인한다.

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A New Islanding Detection Method using Phase-Locked Loop for Inverter-Interfaced Distributed Generators

  • Chung, Il-Yop;Moon, Seung-Il
    • Journal of Electrical Engineering and Technology
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    • v.2 no.2
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    • pp.165-171
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    • 2007
  • This paper proposes a new islanding detection method for inverter-interfaced distributed generators (DG). To detect islanding conditions, this paper calculates the phase angle variation of the system voltage by using the phase-locked loop (PLL) in the inverter controllers. Because almost all inverter systems are equipped with the PLL, the implementation of this method is fairly simple and economical for inverter-interfaced DGs. The detection time can also be shortened by reducing communication delay between the relays and the DGs. The proposed method is based on the fact that islanding conditions result in the frequency and voltage variation of the islanded area. The variation depends on the amount of power mismatch. To improve the accuracy of the detection algorithm, this paper injects small low-frequency reactive power mismatch to the output power of DG.

The Voltage Drop Compensation of Electric Railway Feeding system using a Fuelcell System (연료전지 시스템을 이용한 전기철도 급전계통 전압강하 보상)

  • Kim, Jae-Moon
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.64 no.2
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    • pp.342-348
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    • 2015
  • In this paper, fuel cell power generation system that is being studied in recent railway field was applied to compensate for the voltage drop due to the load as driving electric vehicle. PSIM simulation program is to be used to implement the modeling of the electric railway for AC AT feeder system. For it, It was applied to the product-type single-phase PLL algorithm, step-down converter is controlled as power so as to have the fuelcell generation system. Based on it's result, a reactive power due to the catenary impedance in accordance with the current flowing is compensated as linked with fuelcell generation system which supplied the current to the power supply grid. and then its performance was confirmed that voltage compensation effect obtained at SubStation (SS), SubSectioning Post (SSP), Sectioning Post (SP).

Improvement Control of Power Quality of Grid-Tied PCS for Fuel Cell System (연료전지용 계통연계형 전력변환기의 전력품질개선제어)

  • Lee, J.M.;Jung, S.M.;Suh, I.Y.;Han, S.H.;Mok, H.S.;Choe, G.H.
    • Proceedings of the KIPE Conference
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    • 2007.07a
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    • pp.77-79
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    • 2007
  • The phase angle of the utility voltage is used in current control of grid-tied fuel cell power converter. Therefore if the detection of phase angle is a problem, Current control is affected by the distorted phase angle. This paper presents a problem of synchronous reference frame PLL algorithm for single-phase systems and proposes compensated synchronous reference frame PLL algorithm. The proposed method helps power quality improvement of grid-tied fuel cell power converter under distorted utility conditions. Simulation and experimental results are presented to demonstrate the validity of the proposed method.

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Implementation algorithm and system for generating PWM frequency for berthing the train at station (열차의 정위치 정차용 주파수의 PWM 생성 알고리즘과 시스템 구현)

  • Eun-Taek Han;Chang-Sik Park;Ik-Jae Kim;Dong-Kyoo Shin
    • Journal of Internet Computing and Services
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    • v.24 no.5
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    • pp.37-50
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    • 2023
  • In general, PLL or DDS are mainly used as precise and stable frequency synthesis methods. For stable operation, a PWM frequency generation algorithm was designed and implemented using FPGA. This is an algorithm that creates a frequency 8,192 times the target frequency and then performs the D flip-flop 13 times to generate multiple frequencies with a precision of 1 Hz. Using the designed algorithm, it is applied to the Berthing system for stopping trains in station. The applied product was developed and tested against the existing operating system to confirm its superior performance in terms of frequency generation accuracy.

PLL Control Method for Precise Speed Control of Slotless PM Brushless DC Motor Using 2 Hall-ICs (2 Hall-ICs를 이용한 Slotless PM Brushless DC Motor의 정밀속도제어를 위한 PLL 제어방식)

  • Yoon Y.H;Lee S.J;Kim Y.R;Won C.Y;Choe Y.Y
    • The Transactions of the Korean Institute of Power Electronics
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    • v.10 no.2
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    • pp.109-116
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    • 2005
  • The high performance drives of the slotless Permanent Magnet Brushless DC(PM BLDC) motor can be achieved by the current control, where the currents flow according to the rotor position and the current phase is suitably controlled according to the operational condition. Rotor position information can be provided by Hall-IC or sensorless algorithm. So, the Hall-ICs are set up in this motor to detect the main flux from the rotor. Instead of using three Hall-ICs and encoder, this paper uses only two Hall-ICs for the permanent magnet rotor position and the speed feedback signals, and uses a micro-controller of 16-bit type (80C196KC). Also because of low resolution obtained by using Hall-IC even low-cost and simple structure, to improve the wide range of speed response characteristic more exactly, we propose the rotor position signal synthesizer using PLL circuit based on two Hall-ICs.

Design of Velocity Ripple Controller using Phase Compensation Feedforward Control (피드포워드 제어를 이용한 위상차 보정 속도리플 제어기의 설계)

  • Tae, Won-Hyoung;Kim, Jung-Han;Shim, Jong-Youp;Oh, Jeong-Seok;Song, Jun-Yeob
    • Journal of the Korean Society for Precision Engineering
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    • v.31 no.8
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    • pp.705-713
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    • 2014
  • In this paper, we propose a novel velocity ripple controller using phase compensation feedforward control. Velocity ripples result in many kinds of performance degradations in manufacturing machines, especially such as ultra-precision roll lathes. The generation of velocity ripple in constant velocity control comes from various causes, such as electrical torque ripples, mechanical worn out, inconsistent mass center, etc. Conventional researches about ripple is mainly for reducing torque ripple in actuator level, which is only one of reasons for velocity ripples, so in this study, we focus on eliminating velocity ripples in upper level controller using phase compensation feedforward controller. The proposed algorithm is composed of several modules, such as ripple extractor, phase adjuster and phase follower etc. The suggested algorithm can be easily extended, and it shows a superior performance in the experiments of ultra-precision roll lathes.