• Title/Summary/Keyword: PDU(Protocol Data Unit)

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A Study on the Verification Scheme of SMS Encoding and Decoding Module (SMS 부호화 복호화 모듈 검증 방법에 대한 연구)

  • Choi, Kwang-Hoon
    • Journal of the Korea Society of Computer and Information
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    • v.15 no.6
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    • pp.1-9
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    • 2010
  • This paper proposes a test method for compliance of SMS encoder and decoder modules with 3GPP (3rd Generation Partnership Project) specification on SMS PDU (Protocol Data Unit). The existing tools have focused on providing an SMS gateway and on helping to view and edit a single SMS PDU, which rarely help to resolve the compliance test problem. The proposed compliance test method is based on an automatic generation of SMS PDUs fully compliant with the 3GPP specification by using QuickCheck library written in Haskell. By applying the proposed method to a C-based SMS encoder and decoder in Linux Mobile platform, we have found out several critical bugs such as wrong interpretation of time stamps in BCD format. The automatic SMS PDU generator is reusable in that it only depends on the 3GPP SMS specification. The QuickCheck library is also applicable for testing other network protocol data encoders and decoders, as used in this paper.

VLSI Design of Interface between MAC and PHY Layers for Adaptive Burst Profiling in BWA System (BWA 시스템에서 적응형 버스트 프로파일링을 위한 MAC과 PHY 계층 간 인터페이스의 VLSI 설계)

  • Song Moon Kyou;Kong Min Han
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.42 no.1
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    • pp.39-47
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    • 2005
  • The range of hardware implementation increases in communication systems as high-speed processing is required for high data rate. In the broadband wireless access (BWA) system based on IEEE standard 802.16 the functions of higher part in the MAC layer to Provide data needed for generating MAC PDU are implemented in software, and the tasks from formatting MAC PDUs by using those data to transmitting the messages in a modem are implemented in hardware. In this paper, the interface hardware for efficient message exchange between MAC and PHY layers in the BWA system is designed. The hardware performs the following functions including those of the transmission convergence(TC) sublayer; (1) formatting TC PDU(Protocol data unit) from/to MAC PDU, (2) Reed-solomon(RS) encoding/decoding, and (3) resolving DL MAP and UL MAP, so that it controls transmission slot and uplink and downlink traffic according to the modulation scheme of burst profile. Also, it provides various control signal for PHY modem. In addition, the truncated binary exponential backoff (TBEB) algorithm is implemented in a subscriber station to avoid collision on contention-based transmission of messages. The VLSI architecture performing all these functions is implemented and verified in VHDL.

Design and Implementation of a Bluetooth Encryption Module (블루투스 암호화 모듈의 설계 및 구현)

  • Hwang, Sun-Won;Cho, Sung;An, Jin-Woo;Lee, Sang-Hoon;Shin, We-Jae
    • Proceedings of the Korea Institute of Convergence Signal Processing
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    • 2003.06a
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    • pp.276-279
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    • 2003
  • 본 논문에서는 블루투스 장비 간 암호화를 위해 사용되는 암호화 모듈의 설계 및 구현에 관한 내용을 다룬다. 암호화 모듈은 기저 대역내에 암호화 키 생성 모듈과 암호화 엔진 모듈로 구성된다. 암호화 키 생성 모듈은 Cylink사에서 제안한 공개 도메인인 SAFER+(Secure And Fast Encryption Routine) 알고리즘을 사용하여 128bit 키를 생성한다. 그 구성은 키 치환을 위한 치환 함수(key-controlled substitution)와 선형 변환을 위한 PHT(Pseudo-Hadamard Transform)와 Armenian Shuffle 변환기로 구성된다. 암호화 엔진 모듈은 전송 패킷내의 페이로드 데이터와 생성된 사이퍼 키 스트림 데이터와 XOR연산을 통하려 암호화를 행하며 그 구성은 LFSR (Linear Feedback Shift Register)와 합 결합기로 구성된다. 이 중 암호화 키 생성 모듈은 LM(Link Manager)의 PDU(Protocol Data Unit) 패킷을 통해 상호 정보가 교환되므로 암호화키를 생성하는데 있어 시간적 제약이 덜 하다. 따라서 본 논문에서는 변형된 SAFER+ 알고리즘 구현하는데 있어 치환 함수의 덧셈과 XOR, 로그, 지수연산을 바이트 단위의 순차 계산을 수행함으로써 소요되는 하드웨어 용량을 줄이도록 설계하였다. 본 논문에서 제시한 모듈은 블루투스 표준안 버전 1.1에 근거하여 구현하였으며 시뮬레이션 및 테스트는 Xilinx FPGA를 이용하여 검증하였다.

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Experiments on An Network Processor-based Intrusion Detection (네트워크 프로세서 기반의 침입탐지 시스템 구현)

  • Kim, Hyeong-Ju;Kim, Ik-Kyun;Park, Dae-Chul
    • The KIPS Transactions:PartC
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    • v.11C no.3
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    • pp.319-326
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    • 2004
  • To help network intrusion detection systems(NIDSs) keep up with the demands of today's networks, that we the increasing network throughput and amount of attacks, a radical new approach in hardware and software system architecture is required. In this paper, we propose a Network Processor(NP) based In-Line mode NIDS that supports the packet payload inspection detecting the malicious behaviors, as well as the packet filtering and the traffic metering. In particular, we separate the filtering and metering functions from the deep packet inspection function using two-level searching scheme, thus the complicated and time-consuming operation of the deep packet inspection function does not hinder or flop the basic operations of the In-line mode system. From a proto-type NP-based NIDS implemented at a PC platform with an x86 processor running Linux, two Gigabit Ethernet ports, and 2.5Gbps Agere PayloadPlus(APP) NP solution, the experiment results show that our proposed scheme can reliably filter and meter the full traffic of two gigabit ports at the first level even though it can inspect the packet payload up to 320 Mbps in real-time at the second level, which can be compared to the performance of general-purpose processor based Inspection. However, the simulation results show that the deep packet searching is also possible up to 2Gbps in wire speed when we adopt 10Gbps APP solution.